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Message-ID: <lsq.1507553065.385709958@decadent.org.uk>
Date: Mon, 09 Oct 2017 13:44:25 +0100
From: Ben Hutchings <ben@...adent.org.uk>
To: linux-kernel@...r.kernel.org, stable@...r.kernel.org
CC: akpm@...ux-foundation.org, "Chanwoo Choi" <cw00.choi@...sung.com>,
"Greg Kroah-Hartman" <gregkh@...uxfoundation.org>,
"Marek Szyprowski" <m.szyprowski@...sung.com>
Subject: [PATCH 3.16 164/192] serial: samsung: Reorder the sequence of
clock control when call s3c24xx_serial_set_termios()
3.16.49-rc1 review patch. If anyone has any objections, please let me know.
------------------
From: Chanwoo Choi <cw00.choi@...sung.com>
commit b8995f527aac143e83d3900ff39357651ea4e0f6 upstream.
This patch fixes the broken serial log when changing the clock source
of uart device. Before disabling the original clock source, this patch
enables the new clock source to protect the clock off state for a split second.
Signed-off-by: Chanwoo Choi <cw00.choi@...sung.com>
Reviewed-by: Marek Szyprowski <m.szyprowski@...sung.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@...uxfoundation.org>
Signed-off-by: Ben Hutchings <ben@...adent.org.uk>
---
drivers/tty/serial/samsung.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
--- a/drivers/tty/serial/samsung.c
+++ b/drivers/tty/serial/samsung.c
@@ -757,6 +757,8 @@ static void s3c24xx_serial_set_termios(s
/* check to see if we need to change clock source */
if (ourport->baudclk != clk) {
+ clk_prepare_enable(clk);
+
s3c24xx_serial_setsource(port, clk_sel);
if (!IS_ERR(ourport->baudclk)) {
@@ -764,8 +766,6 @@ static void s3c24xx_serial_set_termios(s
ourport->baudclk = ERR_PTR(-EINVAL);
}
- clk_prepare_enable(clk);
-
ourport->baudclk = clk;
ourport->baudclk_rate = clk ? clk_get_rate(clk) : 0;
}
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