linux-kernel - Re: [PATCH 3/3] alpha: atomics: Add smp_read_barrier

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Message-Id: <20171012151712.GA3521@linux.vnet.ibm.com>
Date:   Thu, 12 Oct 2017 08:17:12 -0700
From:   "Paul E. McKenney" <paulmck@...ux.vnet.ibm.com>
To:     Will Deacon <will.deacon@....com>
Cc:     linux-kernel@...r.kernel.org, mcree@...on.net.nz,
        peterz@...radead.org, rth@...ddle.net, ink@...assic.park.msu.ru,
        mattst88@...il.com, linux-alpha@...r.kernel.org
Subject: Re: [PATCH 3/3] alpha: atomics: Add smp_read_barrier_depends() to
 release/relaxed atomics

On Thu, Oct 12, 2017 at 03:26:17PM +0100, Will Deacon wrote:
> As part of the fight against smp_read_barrier_depends(), we require
> dependency ordering to be preserved when a dependency is headed by a load
> performed using an atomic operation.
> 
> This patch adds smp_read_barrier_depends() to the _release and _relaxed
> atomics on alpha, which otherwise lack anything to enforce dependency
> ordering.
> 
> Signed-off-by: Will Deacon <will.deacon@....com>

Reviewed-by: Paul E. McKenney <paulmck@...ux.vnet.ibm.com>

> ---
>  arch/alpha/include/asm/atomic.h | 13 +++++++++++++
>  1 file changed, 13 insertions(+)
> 
> diff --git a/arch/alpha/include/asm/atomic.h b/arch/alpha/include/asm/atomic.h
> index 498933a7df97..16961a3f45ba 100644
> --- a/arch/alpha/include/asm/atomic.h
> +++ b/arch/alpha/include/asm/atomic.h
> @@ -13,6 +13,15 @@
>   * than regular operations.
>   */
> 
> +/*
> + * To ensure dependency ordering is preserved for the _relaxed and
> + * _release atomics, an smp_read_barrier_depends() is unconditionally
> + * inserted into the _relaxed variants, which are used to build the
> + * barriered versions. To avoid redundant back-to-back fences, we can
> + * define the _acquire and _fence versions explicitly.
> + */
> +#define __atomic_op_acquire(op, args...)	op##_relaxed(args)
> +#define __atomic_op_fence			__atomic_op_release
> 
>  #define ATOMIC_INIT(i)		{ (i) }
>  #define ATOMIC64_INIT(i)	{ (i) }
> @@ -60,6 +69,7 @@ static inline int atomic_##op##_return_relaxed(int i, atomic_t *v)	\
>  	".previous"							\
>  	:"=&r" (temp), "=m" (v->counter), "=&r" (result)		\
>  	:"Ir" (i), "m" (v->counter) : "memory");			\
> +	smp_read_barrier_depends();					\
>  	return result;							\
>  }
> 
> @@ -77,6 +87,7 @@ static inline int atomic_fetch_##op##_relaxed(int i, atomic_t *v)	\
>  	".previous"							\
>  	:"=&r" (temp), "=m" (v->counter), "=&r" (result)		\
>  	:"Ir" (i), "m" (v->counter) : "memory");			\
> +	smp_read_barrier_depends();					\
>  	return result;							\
>  }
> 
> @@ -111,6 +122,7 @@ static __inline__ long atomic64_##op##_return_relaxed(long i, atomic64_t * v)	\
>  	".previous"							\
>  	:"=&r" (temp), "=m" (v->counter), "=&r" (result)		\
>  	:"Ir" (i), "m" (v->counter) : "memory");			\
> +	smp_read_barrier_depends();					\
>  	return result;							\
>  }
> 
> @@ -128,6 +140,7 @@ static __inline__ long atomic64_fetch_##op##_relaxed(long i, atomic64_t * v)	\
>  	".previous"							\
>  	:"=&r" (temp), "=m" (v->counter), "=&r" (result)		\
>  	:"Ir" (i), "m" (v->counter) : "memory");			\
> +	smp_read_barrier_depends();					\
>  	return result;							\
>  }
> 
> -- 
> 2.1.4
>