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Message-ID: <59E07FDE.40307@hisilicon.com>
Date: Fri, 13 Oct 2017 09:57:02 +0100
From: Wei Xu <xuwei5@...ilicon.com>
To: Leo Yan <leo.yan@...aro.org>, Stephen Boyd <sboyd@...eaurora.org>
CC: Rob Herring <robh+dt@...nel.org>,
Mark Rutland <mark.rutland@....com>,
Michael Turquette <mturquette@...libre.com>,
Li Pengcheng <lipengcheng8@...wei.com>,
Zhangfei Gao <zhangfei.gao@...aro.org>,
<linux-arm-kernel@...ts.infradead.org>,
<devicetree@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
<linux-clk@...r.kernel.org>
Subject: Re: [PATCH 0/2] Add support for Hi6220 coresight
Hi Leo,
On 2017/10/7 13:18, Leo Yan wrote:
> Hi Stephen, Wei,
>
> On Thu, Aug 31, 2017 at 06:33:01PM -0700, Stephen Boyd wrote:
>> On 09/01, Leo Yan wrote:
>>> This patch series adds support for coresight on Hi6220; the first patch
>>> is to fix coresight PLL so can avoid system hang after we enable
>>> coresight, the second patch is to add DT binding according to coresight
>>> topology.
>>>
>>> The patch has been tested on Hikey; By using OpenCSD snapshot mode, it
>>> can successfully decode ETF and ETB trace data.
>>>
>>
>> I can take the first one and second one goes through arm-soc?
>
> Could you pick these two patches for Hi6220 coresight enabling for
> this merge window? Or need me resend these two patches?
Applied patch 2 into hisilicon dt tree with slight fix.
Thanks!
BR,
Wei
>
> Thanks,
> Leo Yan
>
> .
>
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