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Message-ID: <20171013090407.7oetdrol6u3mfauy@dell>
Date: Fri, 13 Oct 2017 10:04:07 +0100
From: Lee Jones <lee.jones@...aro.org>
To: Joakim Tjernlund <joakim.tjernlund@...inera.com>
Cc: Peter Tyser <ptyser@...-inc.com>, linux-kernel@...r.kernel.org
Subject: Re: [PATCH] mfd: lpc_ich: Avoton/Rangeley uses SPI_BYT method
On Wed, 11 Oct 2017, Joakim Tjernlund wrote:
> Avoton/Rangeley are based on Silvermount micro-architecture, like
> Bay Trail, and uses the INTEL_SPI_BYT method to drive SPI.
>
> Signed-off-by: Joakim Tjernlund <joakim.tjernlund@...inera.com>
> ---
> drivers/mfd/lpc_ich.c | 1 +
> 1 file changed, 1 insertion(+)
Looks perfectly reasonable to me. Would be good to receive a nod from
one of the Intel or Extreme Engineering guys though.
> diff --git a/drivers/mfd/lpc_ich.c b/drivers/mfd/lpc_ich.c
> index 450ae36645aa..cf1120abbf52 100644
> --- a/drivers/mfd/lpc_ich.c
> +++ b/drivers/mfd/lpc_ich.c
> @@ -522,6 +522,7 @@ static struct lpc_ich_info lpc_chipset_info[] = {
> .name = "Avoton SoC",
> .iTCO_version = 3,
> .gpio_version = AVOTON_GPIO,
> + .spi_type = INTEL_SPI_BYT,
> },
> [LPC_BAYTRAIL] = {
> .name = "Bay Trail SoC",
--
Lee Jones
Linaro STMicroelectronics Landing Team Lead
Linaro.org │ Open source software for ARM SoCs
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