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Message-Id: <1507892203-17033-2-git-send-email-todor.tomov@linaro.org>
Date: Fri, 13 Oct 2017 13:56:40 +0300
From: Todor Tomov <todor.tomov@...aro.org>
To: wsa@...-dreams.de, linux-i2c@...r.kernel.org
Cc: linux-arm-msm@...r.kernel.org, linux-kernel@...r.kernel.org,
Todor Tomov <todor.tomov@...aro.org>,
Rob Herring <robh+dt@...nel.org>,
Mark Rutland <mark.rutland@....com>, devicetree@...r.kernel.org
Subject: [PATCH v2 1/4] dt-bindings: media: Binding document for Qualcomm Camera Control Interface driver
Add DT binding document for Qualcomm Camera Control Interface driver
CC: Rob Herring <robh+dt@...nel.org>
CC: Mark Rutland <mark.rutland@....com>
CC: devicetree@...r.kernel.org
Signed-off-by: Todor Tomov <todor.tomov@...aro.org>
---
.../devicetree/bindings/i2c/i2c-qcom-cci.txt | 46 ++++++++++++++++++++++
1 file changed, 46 insertions(+)
create mode 100644 Documentation/devicetree/bindings/i2c/i2c-qcom-cci.txt
diff --git a/Documentation/devicetree/bindings/i2c/i2c-qcom-cci.txt b/Documentation/devicetree/bindings/i2c/i2c-qcom-cci.txt
new file mode 100644
index 0000000..cb1fe15
--- /dev/null
+++ b/Documentation/devicetree/bindings/i2c/i2c-qcom-cci.txt
@@ -0,0 +1,46 @@
+Qualcomm Camera Control Interface controller
+
+Required properties:
+ - compatible: Should be one of:
+ - "qcom,cci-v1.0.8" for 8916;
+ - "qcom,cci-v1.4.0" for 8996.
+ - #address-cells: Should be <1>.
+ - #size-cells: Should be <0>.
+ - reg: Base address of the controller and length of memory mapped region.
+ - interrupts: Specifier for CCI interrupt.
+ - clocks: List of clock specifiers, one for each entry in clock-names.
+ - clock-names: Should contain:
+ - "mmss_mmagic_ahb" - on 8996 only;
+ - "camss_top_ahb";
+ - "cci_ahb";
+ - "cci";
+ - "camss_ahb".
+
+Required properties on 8996:
+ - power-domains: Power domain specifier.
+
+Optional:
+ - clock-frequency: Desired I2C bus clock frequency in Hz, defaults to 100 kHz
+ if omitted.
+
+Example:
+
+ cci@...000 {
+ compatible = "qcom,cci-v1.4.0";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0xa0c000 0x1000>;
+ interrupts = <GIC_SPI 295 IRQ_TYPE_EDGE_RISING>;
+ power-domains = <&mmcc CAMSS_GDSC>;
+ clocks = <&mmcc MMSS_MMAGIC_AHB_CLK>,
+ <&mmcc CAMSS_TOP_AHB_CLK>,
+ <&mmcc CAMSS_CCI_AHB_CLK>,
+ <&mmcc CAMSS_CCI_CLK>,
+ <&mmcc CAMSS_AHB_CLK>;
+ clock-names = "mmss_mmagic_ahb",
+ "camss_top_ahb",
+ "cci_ahb",
+ "cci",
+ "camss_ahb";
+ clock-frequency = <400000>;
+ };
--
2.7.4
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