linux-kernel - Re: [PATCH v3 07/11] perf, tools, list: Add metric groups to perf list

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Date:   Fri, 13 Oct 2017 11:50:59 -0300
From:   Arnaldo Carvalho de Melo <acme@...nel.org>
To:     Andi Kleen <andi@...stfloor.org>
Cc:     jolsa@...nel.org, linux-kernel@...r.kernel.org,
        Andi Kleen <ak@...ux.intel.com>
Subject: Re: [PATCH v3 07/11] perf, tools, list: Add metric groups to perf
 list

Em Thu, Aug 31, 2017 at 12:40:32PM -0700, Andi Kleen escreveu:
> From: Andi Kleen <ak@...ux.intel.com>
> 
> Add code to perf list to print metric groups, and metrics
> that don't have an event name. The metricgroup code collects
> the eventgroups and events into a rblist, and then prints
> them according to the configured filters.
> 
> The metricgroups are printed by default, but can be
> limited by perf list metric or perf list metricgroup

Andi, I just noticed that metric groups appear when we pass some
substring to search events that looks unrelated, can you please take a
look at this?

Thanks,

- Arnaldo

[root@...et ~]# perf list energy-cores 
oList of pre-defined events (to be used in -e):

  power/energy-cores/                                [Kernel PMU event]


Metric Groups:

DSB:
  DSB_Coverage
        [Fraction of Uops delivered by the DSB (aka Decoded Icache; or Uop Cache)]
FLOPS:
  GFLOPs
        [Giga Floating Point Operations Per Second]
Frontend:
  IFetch_Line_Utilization
        [Rough Estimation of fraction of fetched lines bytes that were likely consumed by program instructions]
Frontend_Bandwidth:
  DSB_Coverage
        [Fraction of Uops delivered by the DSB (aka Decoded Icache; or Uop Cache)]
Memory_BW:
  MLP
        [Memory-Level-Parallelism (average number of L1 miss demand load when there is at least 1 such miss)]
Memory_Bound:
  Load_Miss_Real_Latency
        [Actual Average Latency for L1 data-cache miss demand loads]
  MLP
        [Memory-Level-Parallelism (average number of L1 miss demand load when there is at least 1 such miss)]
Memory_Lat:
  Load_Miss_Real_Latency
        [Actual Average Latency for L1 data-cache miss demand loads]
Pipeline:
  CPI