linux-kernel - Re: [PATCH 7/9] KVM: arm/arm64: vgic-its: free caches when GITS

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Message-ID: <20171016095913.GB1845@lvm>
Date:   Mon, 16 Oct 2017 11:59:13 +0200
From:   Christoffer Dall <cdall@...aro.org>
To:     Auger Eric <eric.auger@...hat.com>
Cc:     eric.auger.pro@...il.com, linux-kernel@...r.kernel.org,
        kvm@...r.kernel.org, marc.zyngier@....com,
        peter.maydell@...aro.org, andre.przywara@....com,
        wanghaibin.wang@...wei.com, wu.wubin@...wei.com
Subject: Re: [PATCH 7/9] KVM: arm/arm64: vgic-its: free caches when
 GITS_BASER Valid bit is cleared

On Mon, Oct 16, 2017 at 11:44:05AM +0200, Auger Eric wrote:
> Hi Christoffer,
> On 16/10/2017 11:26, Christoffer Dall wrote:
> > Hi Eric,
> > 
> > On Mon, Sep 25, 2017 at 03:34:36PM +0200, Eric Auger wrote:
> >> When the GITS_BASER<n>.Valid gets cleared, the data structures in
> >> guest RAM are not provisionned anymore. The device, collection
> >> and LPI lists stored in the in-kernel ITS represent the same
> >> information in some form of cache. So let's void the cache.
> > 
> > Just a thought.  What about the opposite case, if the BASERs were
> > previously not valid, and then become valid, is the ITS expected restore
> > the state from memory?
> > 
> > Thanks,
> > -Christoffer
> > 
> No the spec does not mandate that as far as I understand. Also the spec
> does not mandate clearing the cache when BASER moves to invalid (which
> this patch does), although this would have madee sense to me. So maybe
> we should drop that patch and only clean the cache when the IOCTL is used.
> 
I thought Marc pointed out that there is at least one hardware
implementation which does clean its cache when the BASER moves to
invalid, so it's not unlikely that software could rely on this behavior,
and I therefore think we should implement it, because it's not in
violation of the spec either.

Thanks,
-Christoffer