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Date:   Mon, 16 Oct 2017 12:29:25 +0200
From:   Matthias Brugger <matthias.bgg@...il.com>
To:     Weiyi Lu <weiyi.lu@...iatek.com>,
        Stephen Boyd <sboyd@...eaurora.org>
Cc:     Rob Herring <robh@...nel.org>,
        James Liao <jamesjj.liao@...iatek.com>,
        Fan Chen <fan.chen@...iatek.com>, devicetree@...r.kernel.org,
        linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
        linux-mediatek@...ts.infradead.org, linux-clk@...r.kernel.org,
        srv_heupstream@...iatek.com
Subject: Re: [PATCH v4 0/9] Mediatek MT2712 clock and scpsys support



On 10/16/2017 08:42 AM, Weiyi Lu wrote:
> On Fri, 2017-10-13 at 16:50 +0200, Matthias Brugger wrote:
>>
>> On 10/13/2017 12:45 AM, Stephen Boyd wrote:
>>> On 09/19, Weiyi Lu wrote:
>>>> This series is based on v4.14-rc1 and composed of
>>>> clock control (PATCH 1-4) and scpsys control (PATCH 5-9)
>>>
>>> What's the merge plan? Can I apply the clk ones to clk tree and
>>> ignore the rest?
>>>
>>
>> Yes, please do so. I'll take scpsys, which depends on the clock patches.
>>
>> Regards,
>> Matthias
> 
> Hi Stephen & Matthias,
> 
> I will start to separate this patch set into three series
> (clk/scpsys/dts) when I send the next version.
> 

There are no comments on the clk patches, so no need to resend them, if Stephen 
is ok with taking patch 1,2,3.

If you want you can split out patch 4 and 9, but for me it's ok if they go 
together with the scpsys driver. When scpsys is ready I will take them all 
through my tree.

Regards,
Matthias

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