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Message-ID: <20171018064649.GA7734@infradead.org>
Date:   Tue, 17 Oct 2017 23:46:49 -0700
From:   Christoph Hellwig <hch@...radead.org>
To:     Florian Fainelli <f.fainelli@...il.com>
Cc:     Christoph Hellwig <hch@...radead.org>,
        Jim Quinlan <jim2101024@...il.com>,
        linux-kernel@...r.kernel.org,
        bcm-kernel-feedback-list@...adcom.com,
        linux-arm-kernel@...ts.infradead.org, linux-mips@...ux-mips.org,
        devicetree@...r.kernel.org, linux-pci@...r.kernel.org,
        Ralf Baechle <ralf@...ux-mips.org>,
        Catalin Marinas <catalin.marinas@....com>,
        Will Deacon <will.deacon@....com>,
        Bjorn Helgaas <bhelgaas@...gle.com>,
        Rob Herring <robh+dt@...nel.org>,
        Mark Rutland <mark.rutland@....com>,
        Gregory Fong <gregory.0xf0@...il.com>,
        Kevin Cernekee <cernekee@...il.com>,
        Brian Norris <computersforpeace@...il.com>
Subject: Re: [PATCH 1/9] SOC: brcmstb: add memory API

On Tue, Oct 17, 2017 at 09:12:22AM -0700, Florian Fainelli wrote:
> > Please move this into the arm arch code.
> 
> No, this needs to work on both ARM and ARM64, hence the reason why this
> is in a reasonably architecture neutral place.

So there is no other shared code between the ARM and ARM64 ports for
this SOC?

> >> +EXPORT_SYMBOL(brcmstb_memory_phys_addr_to_memc);
> > 
> >> +EXPORT_SYMBOL(brcmstb_memory_memc_size);
> > 
> > Why is this exported?
> 
> Because the PCIE RC driver can be built as a module.

Hmm, supporting PCIE RC as module sounds odd, but it seems like there
are a few others like that.  At least make it EXPORT_SYMBOL_GPL() then
to document the internal nature.

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