linux-kernel - Re: [PATCH 1/3] Documentation/devicetree: Add pcie-reset-suspend property

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <CA+ASDXPNcoUE=F+TWsYpxw=e-NcPaqguSRb5fEYC+zoCCdvDvg@mail.gmail.com>
Date:   Tue, 17 Oct 2017 17:56:32 -0700
From:   Brian Norris <briannorris@...omium.org>
To:     Bjorn Helgaas <helgaas@...nel.org>
Cc:     Bjorn Helgaas <bhelgaas@...gle.com>,
        Rajat Jain <rajatja@...gle.com>,
        Rob Herring <robh+dt@...nel.org>,
        Mark Rutland <mark.rutland@....com>,
        Frank Rowand <frowand.list@...il.com>,
        Shawn Lin <shawn.lin@...k-chips.com>,
        Heiko Stuebner <heiko@...ech.de>, linux-pci@...r.kernel.org,
        devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
        "open list:ARM/Rockchip SoC..." <linux-rockchip@...ts.infradead.org>,
        linux-arm-kernel@...ts.infradead.org,
        Doug Anderson <dianders@...omium.org>
Subject: Re: [PATCH 1/3] Documentation/devicetree: Add pcie-reset-suspend property

On Tue, Oct 17, 2017 at 4:39 PM, Brian Norris <briannorris@...omium.org> wrote:
> On Fri, Oct 13, 2017 at 11:51:52AM -0500, Bjorn Helgaas wrote:
> > If so, I really don't want to get involved in that, because that's an
> > issue that needs to be resolved by the vendors and the PCI-SIG.  If we
>
> Judging by conversations with these vendors, I can't really imagine them
> proactively dealing with the PCI-SIG on this. Is that really what you
> think will work best?
>
> I personally believe deferring (i.e., ignoring) the problem will not
> cause any change; badly behaved vendors will just do whatever suits
> them, and system designers will have to figure it out somehow -- ACPI
> systems will have platform-specific behavior hidden in firmware; device
> tree systems will do whatever they want out of tree; and the rare device
> tree system that gets upstream support will either have suboptimal power
> management, or have to have these sorts of conversations again. None of
> that puts pressure on an endpoint vendor to talk to the PCI-SIG.

I'll add a little more to my claim about ACPI systems. I chatted a
little more with another engineer on my team who has dealt with ACPI
firmware for a few generations of Intel platforms. Even among the
latest two platforms he dealt with, there have been two different
sorts of chipset bugs (at the host/root complex side, not just the
endpoint) that have yielded different decisions on how to handle
PERST#. This was opaque to Linux though, since that's how system
firmware rolls :)

I expect this will not be the last discrepancy on how to handle
PERST#. And to my knowledge, none of the above initiated any
discussion with the PCI-SIG.

Brian