Message-Id: <20171018143629.29302-6-miquel.raynal@free-electrons.com>
Date:   Wed, 18 Oct 2017 16:36:22 +0200
From:   Miquel Raynal <miquel.raynal@...e-electrons.com>
To:     Andrew Lunn <andrew@...n.ch>,
        bcm-kernel-feedback-list@...adcom.com,
        Boris Brezillon <boris.brezillon@...e-electrons.com>,
        Brian Norris <computersforpeace@...il.com>,
        Catalin Marinas <catalin.marinas@....com>,
        Chen-Yu Tsai <wens@...e.org>,
        Cyrille Pitchen <cyrille.pitchen@...ev4u.fr>,
        Daniel Mack <daniel@...que.org>,
        David Woodhouse <dwmw2@...radead.org>,
        devel@...verdev.osuosl.org, devicetree@...r.kernel.org,
        Ezequiel Garcia <ezequiel.garcia@...e-electrons.com>,
        Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
        Gregory Clement <gregory.clement@...e-electrons.com>,
        Han Xu <han.xu@....com>,
        Haojian Zhuang <haojian.zhuang@...il.com>,
        Jason Cooper <jason@...edaemon.net>,
        Josh Wu <rainyfeeling@...look.com>,
        Kamal Dasu <kdasu.kdev@...il.com>,
        linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
        linux-mediatek@...ts.infradead.org, linux-mtd@...ts.infradead.org,
        Marc Gonzalez <marc_gonzalez@...madesigns.com>,
        Marek Vasut <marek.vasut@...il.com>,
        Mark Rutland <mark.rutland@....com>,
        Masahiro Yamada <yamada.masahiro@...ionext.com>,
        Matthias Brugger <matthias.bgg@...il.com>,
        Maxime Ripard <maxime.ripard@...e-electrons.com>,
        Maxim Levitsky <maximlevitsky@...il.com>,
        Richard Weinberger <richard@....at>,
        Robert Jarzmik <robert.jarzmik@...e.fr>,
        Rob Herring <robh+dt@...nel.org>,
        Russell King <linux@...linux.org.uk>,
        Sebastian Hesselbarth <sebastian.hesselbarth@...il.com>,
        Stefan Agner <stefan@...er.ch>,
        Sylvain Lemieux <slemieux.tyco@...il.com>,
        Vladimir Zapolskiy <vz@...ia.com>,
        Wenyou Yang <wenyou.yang@...el.com>,
        Will Deacon <will.deacon@....com>
Cc:     Thomas Petazzoni <thomas.petazzoni@...e-electrons.com>,
        Antoine Tenart <antoine.tenart@...e-electrons.com>,
        Miquel Raynal <miquel.raynal@...e-electrons.com>,
        Igor Grinberg <grinberg@...pulab.co.il>,
        Nadav Haklai <nadavh@...vell.com>,
        Ofer Heifetz <oferh@...vell.com>,
        Neta Zur Hershkovits <neta@...vell.com>,
        Hanna Hawa <hannah@...vell.com>
Subject: [RFC 05/12] dt-bindings: mtd: add Marvell NAND controller documentation

Document the bindings for the legacy and the new bindings relative to
Marvell NAND controller driver rework.

Signed-off-by: Miquel Raynal <miquel.raynal@...e-electrons.com>
---
 .../devicetree/bindings/mtd/marvell-nand.txt       | 95 ++++++++++++++++++++++
 1 file changed, 95 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/mtd/marvell-nand.txt

diff --git a/Documentation/devicetree/bindings/mtd/marvell-nand.txt b/Documentation/devicetree/bindings/mtd/marvell-nand.txt
new file mode 100644
index 000000000000..ea99f426c03f
--- /dev/null
+++ b/Documentation/devicetree/bindings/mtd/marvell-nand.txt
@@ -0,0 +1,95 @@
+Marvell NAND Flash Controller (NFC)
+
+Required properties:
+C'est faux, t'en a rajouté un y a pas longtps :).
+Je conseille de mettre ça sous forme de liste, genre
+
+- compatible: can be one of the following:
+    * "marvell,armada-8k-nand-controller"
+    * "marvell,armada370-nand-controller"
+    * "marvell,pxa3xx-nand-controller"
+    * "marvell,armada-8k-nand" (deprecated)
+    * "marvell,armada370-nand" (deprecated)
+    * "marvell,pxa3xx-nand" (deprecated)
+- reg: shall contain registers location and length for data and reg.
+- #address-cells: shall be set to 1. Encode the nand CS.
+- #size-cells: shall be set to 0.
+- interrupts: shall define the nand controller interrupt.
+- clocks: shall reference nand controller clocks.
+- marvell,system-controller: Set to retrieve the syscon node that handles
+  NAND controller related registers (only required with the
+  "marvell,armada-8k-nand[-controller]" compatibles).
+
+Optional properties:
+- dmas: shall reference DMA channel associated to the NAND controller.
+- dma-names: shall be "rxtx".
+
+Optional children nodes:
+Children nodes represent the available NAND chips.
+
+Required properties:
+- reg: shall contain the native Chip Select ids (0-3)
+- marvell,rb: shall contain the native Ready/Busy ids (0-1)
+
+Optional properties:
+- marvell,nand-keep-config: orders the driver not to take the timings
+  from the core and leaving them completely untouched. Bootloader
+  timings will then be used.
+- marvell,nand-enable-arbiter: only useful for PXA platforms, will
+  enable bus arbiter between NFC and DFI bus (must be enabled for
+  NFC operation)
+- nand-on-flash-bbt: speed up the boot process by not discovering all
+  the bad blocks at each boot and reading directly an on flash table.
+- nand-ecc-mode: one of the supported ECC modes ("none", "soft",
+  "hw"). If not specified, hardware ECC will be used.
+- nand-ecc-algo: algorithm to use if previous choice was "soft"
+  ("hamming" or "bch). This property may be added for hardware ECC for
+  clarification but will be ignored by the driver because ECC mode is
+  chosen depending on the page size and the strength required by the
+  NAND chip. This value may be overwritten with the nand-ecc-strength
+  property.
+- nand-ecc-strength: desired ECC strength.
+- nand-ecc-step-size: indication on the ECC step size. This has no
+  effect and will be ignored by the driver when using hardware
+  ECC. Because Marvell's NAND flash controller does use fixed strength
+  (1-bit for Hamming, 16-bit for BCH), the step size will shrink or
+  grown in order to fit the required strength and the value
+  updated. Step sizes are not completely random for all and follow
+  certain patterns described in AN-379, "Marvell SoC NFC ECC".
+
+See Documentation/devicetree/bindings/mtd/nand.txt for more details on
+generic bindings.
+
+
+Example:
+nand_controller: nand-controller@...00 {
+	compatible = "marvell,armada370-nand-controller";
+	reg = <0xd0000 0x54>;
+	#address-cells = <1>;
+	#size-cells = <0>;
+	interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
+	clocks = <&coredivclk 0>;
+	status = "okay";
+
+	nand@0 {
+		reg = <0>;
+		marvell,rb = <0>;
+		nand-ecc-mode = "hw";
+		marvell,nand-keep-config;
+		marvell,nand-enable-arbiter;
+		nand-on-flash-bbt;
+		nand-ecc-strength = <4>;
+		nand-ecc-step-size = <512>;
+
+		partitions {
+			compatible = "fixed-partitions";
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			partition@0 {
+				label = "Rootfs";
+				reg = <0x00000000 0x40000000>;
+			};
+		};
+	};
+};
-- 
2.11.0

Powered by blists - more mailing lists