linux-kernel - Re: [PATCH 01/11] Initialize the mapping of KASan shadow memory

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Date:   Thu, 19 Oct 2017 13:01:37 +0100
From:   Russell King - ARM Linux <linux@...linux.org.uk>
To:     Dmitry Osipenko <digetx@...il.com>
Cc:     Abbott Liu <liuwenliang@...wei.com>, aryabinin@...tuozzo.com,
        afzal.mohd.ma@...il.com, f.fainelli@...il.com, labbott@...hat.com,
        kirill.shutemov@...ux.intel.com, mhocko@...e.com, cdall@...aro.org,
        marc.zyngier@....com, catalin.marinas@....com,
        akpm@...ux-foundation.org, mawilcox@...rosoft.com,
        tglx@...utronix.de, thgarnie@...gle.com, keescook@...omium.org,
        arnd@...db.de, vladimir.murzin@....com, tixy@...aro.org,
        ard.biesheuvel@...aro.org, robin.murphy@....com, mingo@...nel.org,
        grygorii.strashko@...aro.org, glider@...gle.com,
        dvyukov@...gle.com, opendmb@...il.com,
        linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
        kasan-dev@...glegroups.com, linux-mm@...ck.org,
        jiazhenghua@...wei.com, dylix.dailei@...wei.com,
        zengweilin@...wei.com, heshaoliang@...wei.com
Subject: Re: [PATCH 01/11] Initialize the mapping of KASan shadow memory

On Thu, Oct 12, 2017 at 02:42:49AM +0300, Dmitry Osipenko wrote:
> On 11.10.2017 11:22, Abbott Liu wrote:
> > +void __init kasan_map_early_shadow(pgd_t *pgdp)
> > +{
> > +	int i;
> > +	unsigned long start = KASAN_SHADOW_START;
> > +	unsigned long end = KASAN_SHADOW_END;
> > +	unsigned long addr;
> > +	unsigned long next;
> > +	pgd_t *pgd;
> > +
> > +	for (i = 0; i < PTRS_PER_PTE; i++)
> > +		set_pte_at(&init_mm, KASAN_SHADOW_START + i*PAGE_SIZE,
> > +			&kasan_zero_pte[i], pfn_pte(
> > +				virt_to_pfn(kasan_zero_page),
> > +				__pgprot(_L_PTE_DEFAULT | L_PTE_DIRTY | L_PTE_XN)));
> 
> Shouldn't all __pgprot's contain L_PTE_MT_WRITETHROUGH ?

One of the architecture restrictions is that the cache attributes of
all aliases should match (but there is a specific workaround that
permits this, provided that the dis-similar mappings aren't accessed
without certain intervening instructions.)

Why should it be L_PTE_MT_WRITETHROUGH, and not the same cache
attributes as the lowmem mapping?

-- 
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