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Message-ID: <a318bdec-e36c-ddd6-93fa-e8646a553b36@gmail.com>
Date:   Thu, 19 Oct 2017 18:31:21 +0200
From:   Matthias Brugger <matthias.bgg@...il.com>
To:     Ryder Lee <ryder.lee@...iatek.com>
Cc:     linux-mediatek@...ts.infradead.org, linux-kernel@...r.kernel.org,
        devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
        Erin Lo <erin.lo@...iatek.com>, YT Shen <yt.shen@...iatek.com>
Subject: Re: [PATCH v3 06/10] arm: dts: mt7623: add subsystem clock controller
 nodes



On 10/02/2017 03:54 AM, Ryder Lee wrote:
> This patch adds missing susbsystem clock controllers nodes for MT7623.
> (e.g., mmsys, imgsys, vdecsys and bdpsys)
> 
> Signed-off-by: Ryder Lee <ryder.lee@...iatek.com>
> ---
>  arch/arm/boot/dts/mt7623.dtsi | 32 ++++++++++++++++++++++++++++++++
>  1 file changed, 32 insertions(+)
> 
> diff --git a/arch/arm/boot/dts/mt7623.dtsi b/arch/arm/boot/dts/mt7623.dtsi
> index 0640fb7..a877f9a 100644
> --- a/arch/arm/boot/dts/mt7623.dtsi
> +++ b/arch/arm/boot/dts/mt7623.dtsi
> @@ -661,6 +661,30 @@
>  		status = "disabled";
>  	};
>  
> +	mmsys: syscon@...00000 {
> +		compatible = "mediatek,mt7623-mmsys",
> +			     "mediatek,mt2701-mmsys",
> +			     "syscon";
> +		reg = <0 0x14000000 0 0x1000>;
> +		#clock-cells = <1>;
> +	};

We better wait until we have figured out how to fix the issues we see.
Please resubmit when that's clear.

Same holds for patch 8/10

Thanks,
Matthias

> +
> +	imgsys: syscon@...00000 {
> +		compatible = "mediatek,mt7623-imgsys",
> +			     "mediatek,mt2701-imgsys",
> +			     "syscon";
> +		reg = <0 0x15000000 0 0x1000>;
> +		#clock-cells = <1>;
> +	};
> +
> +	vdecsys: syscon@...00000 {
> +		compatible = "mediatek,mt7623-vdecsys",
> +			     "mediatek,mt2701-vdecsys",
> +			     "syscon";
> +		reg = <0 0x16000000 0 0x1000>;
> +		#clock-cells = <1>;
> +	};
> +
>  	hifsys: syscon@...00000 {
>  		compatible = "mediatek,mt7623-hifsys",
>  			     "mediatek,mt2701-hifsys",
> @@ -799,4 +823,12 @@
>  		power-domains = <&scpsys MT2701_POWER_DOMAIN_ETH>;
>  		status = "disabled";
>  	};
> +
> +	bdpsys: syscon@...00000 {
> +		compatible = "mediatek,mt7623-bdpsys",
> +			     "mediatek,mt2701-bdpsys",
> +			     "syscon";
> +		reg = <0 0x1c000000 0 0x1000>;
> +		#clock-cells = <1>;
> +	};
>  };
> 

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