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Message-ID: <20171020085259.8093-4-liwei213@huawei.com>
Date:   Fri, 20 Oct 2017 16:52:57 +0800
From:   Li Wei <liwei213@...wei.com>
To:     <robh+dt@...nel.org>, <mark.rutland@....com>,
        <xuwei5@...ilicon.com>, <catalin.marinas@....com>,
        <will.deacon@....com>, <vinholikatti@...il.com>,
        <jejb@...ux.vnet.ibm.com>, <martin.petersen@...cle.com>,
        <khilman@...libre.com>, <arnd@...db.de>,
        <gregory.clement@...e-electrons.com>,
        <thomas.petazzoni@...e-electrons.com>,
        <yamada.masahiro@...ionext.com>, <riku.voipio@...aro.org>,
        <treding@...dia.com>, <krzk@...nel.org>, <eric@...olt.net>,
        <devicetree@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
        <linux-arm-kernel@...ts.infradead.org>,
        <linux-scsi@...r.kernel.org>
CC:     <guodong.xu@...aro.org>, <liwei213@...wei.com>,
        <fengbaopeng@...ilicon.com>, <lihuan41@...ilicon.com>,
        <wangyupeng4@...ilicon.com>
Subject: [PATCH v5 3/5] arm64: dts: add ufs dts node

arm64: dts: add ufs node for Hisilicon.

Signed-off-by: Li Wei <liwei213@...wei.com>
---
 arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts |  5 +++++
 arch/arm64/boot/dts/hisilicon/hi3660.dtsi         | 19 +++++++++++++++++++
 2 files changed, 24 insertions(+)

diff --git a/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts b/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts
index fd4705c451e2..677d0e41667f 100644
--- a/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts
+++ b/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts
@@ -276,3 +276,8 @@
 		interrupts = <3 IRQ_TYPE_EDGE_RISING>;
 	};
 };
+
+&ufs {
+	reset-gpios = <&gpio18 1 0>;
+	status = "okay";
+};
diff --git a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
index b7a90d632959..a24ab8472347 100644
--- a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
@@ -978,5 +978,24 @@
 			clocks = <&crg_ctrl HI3660_OSC32K>;
 			clock-names = "apb_pclk";
 		};
+
+		ufs: ufs@...b0000 {
+			compatible = "hisilicon,hi3660-ufs", "jedec,ufs-1.1";
+			/* 0: HCI standard */
+			/* 1: UFS SYS CTRL */
+			reg = <0x0 0xff3b0000 0x0 0x1000>,
+				<0x0 0xff3b1000 0x0 0x1000>;
+			interrupt-parent = <&gic>;
+			interrupts = <GIC_SPI 278 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&crg_ctrl HI3660_CLK_GATE_UFSIO_REF>,
+				<&crg_ctrl HI3660_CLK_GATE_UFSPHY_CFG>;
+			clock-names = "clk_ref", "clk_phy";
+			freq-table-hz = <0 0>, <0 0>;
+			/* offset: 0x84; bit: 12 */
+			/* offset: 0x84; bit: 7  */
+			resets = <&crg_rst 0x84 12>,
+				<&crg_rst 0x84 7>;
+			reset-names = "rst", "assert";
+		};
 	};
 };
-- 
2.11.0

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