lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [day] [month] [year] [list]
Message-ID: <4e4cce66-9b02-ac48-dca5-92f55d45f83b@codeaurora.org>
Date:   Fri, 20 Oct 2017 18:41:03 +0530
From:   Archit Taneja <architt@...eaurora.org>
To:     Rob Clark <robdclark@...il.com>, dri-devel@...ts.freedesktop.org
Cc:     linux-arm-msm@...r.kernel.org, freedreno@...ts.freedesktop.org,
        David Airlie <airlied@...ux.ie>,
        Daniel Vetter <daniel.vetter@...ll.ch>,
        linux-kernel@...r.kernel.org
Subject: Re: [PATCH] drm/msm/mdp5: don't use autosuspend



On 10/20/2017 05:47 PM, Rob Clark wrote:
> It's only likely to paper over bugs.  Unlike the gpu, where we want to
> keep things alive a bit longer in expectation of the next frame's
> submit, when the display is shut down we can power off immediately.

Acked-by: Archit Taneja <architt@...eaurora.org>

> 
> Signed-off-by: Rob Clark <robdclark@...il.com>
> ---
>   drivers/gpu/drm/msm/mdp/mdp5/mdp5_cmd_encoder.c |  2 +-
>   drivers/gpu/drm/msm/mdp/mdp5/mdp5_crtc.c        |  6 +++---
>   drivers/gpu/drm/msm/mdp/mdp5/mdp5_encoder.c     |  2 +-
>   drivers/gpu/drm/msm/mdp/mdp5/mdp5_irq.c         | 10 +++++-----
>   drivers/gpu/drm/msm/mdp/mdp5/mdp5_kms.c         |  6 +++---
>   5 files changed, 13 insertions(+), 13 deletions(-)
> 
> diff --git a/drivers/gpu/drm/msm/mdp/mdp5/mdp5_cmd_encoder.c b/drivers/gpu/drm/msm/mdp/mdp5/mdp5_cmd_encoder.c
> index 60790df91bfa..1abc7f5c345c 100644
> --- a/drivers/gpu/drm/msm/mdp/mdp5/mdp5_cmd_encoder.c
> +++ b/drivers/gpu/drm/msm/mdp/mdp5/mdp5_cmd_encoder.c
> @@ -224,7 +224,7 @@ int mdp5_cmd_encoder_set_split_display(struct drm_encoder *encoder,
>   	mdp5_write(mdp5_kms, REG_MDP5_SPLIT_DPL_LOWER,
>   		   MDP5_SPLIT_DPL_LOWER_SMART_PANEL);
>   	mdp5_write(mdp5_kms, REG_MDP5_SPLIT_DPL_EN, 1);
> -	pm_runtime_put_autosuspend(dev);
> +	pm_runtime_put_sync(dev);
>   
>   	return 0;
>   }
> diff --git a/drivers/gpu/drm/msm/mdp/mdp5/mdp5_crtc.c b/drivers/gpu/drm/msm/mdp/mdp5/mdp5_crtc.c
> index 0b6ace26d622..6aa3a688d9a4 100644
> --- a/drivers/gpu/drm/msm/mdp/mdp5/mdp5_crtc.c
> +++ b/drivers/gpu/drm/msm/mdp/mdp5/mdp5_crtc.c
> @@ -429,7 +429,7 @@ static void mdp5_crtc_atomic_disable(struct drm_crtc *crtc,
>   		mdp_irq_unregister(&mdp5_kms->base, &mdp5_crtc->pp_done);
>   
>   	mdp_irq_unregister(&mdp5_kms->base, &mdp5_crtc->err);
> -	pm_runtime_put_autosuspend(dev);
> +	pm_runtime_put_sync(dev);
>   
>   	mdp5_crtc->enabled = false;
>   }
> @@ -821,7 +821,7 @@ static int mdp5_crtc_cursor_set(struct drm_crtc *crtc,
>   	crtc_flush(crtc, flush_mask);
>   
>   end:
> -	pm_runtime_put_autosuspend(&pdev->dev);
> +	pm_runtime_put_sync(&pdev->dev);
>   	if (old_bo) {
>   		drm_flip_work_queue(&mdp5_crtc->unref_cursor_work, old_bo);
>   		/* enable vblank to complete cursor work: */
> @@ -867,7 +867,7 @@ static int mdp5_crtc_cursor_move(struct drm_crtc *crtc, int x, int y)
>   
>   	crtc_flush(crtc, flush_mask);
>   
> -	pm_runtime_put_autosuspend(&mdp5_kms->pdev->dev);
> +	pm_runtime_put_sync(&mdp5_kms->pdev->dev);
>   
>   	return 0;
>   }
> diff --git a/drivers/gpu/drm/msm/mdp/mdp5/mdp5_encoder.c b/drivers/gpu/drm/msm/mdp/mdp5/mdp5_encoder.c
> index 5b851380d3f2..36ad3cbe5f79 100644
> --- a/drivers/gpu/drm/msm/mdp/mdp5/mdp5_encoder.c
> +++ b/drivers/gpu/drm/msm/mdp/mdp5/mdp5_encoder.c
> @@ -384,7 +384,7 @@ int mdp5_vid_encoder_set_split_display(struct drm_encoder *encoder,
>   
>   	mdp5_ctl_pair(mdp5_encoder->ctl, mdp5_slave_enc->ctl, true);
>   
> -	pm_runtime_put_autosuspend(dev);
> +	pm_runtime_put_sync(dev);
>   
>   	return 0;
>   }
> diff --git a/drivers/gpu/drm/msm/mdp/mdp5/mdp5_irq.c b/drivers/gpu/drm/msm/mdp/mdp5/mdp5_irq.c
> index bb5deb00c899..280e368bc9bb 100644
> --- a/drivers/gpu/drm/msm/mdp/mdp5/mdp5_irq.c
> +++ b/drivers/gpu/drm/msm/mdp/mdp5/mdp5_irq.c
> @@ -54,7 +54,7 @@ void mdp5_irq_preinstall(struct msm_kms *kms)
>   	pm_runtime_get_sync(dev);
>   	mdp5_write(mdp5_kms, REG_MDP5_INTR_CLEAR, 0xffffffff);
>   	mdp5_write(mdp5_kms, REG_MDP5_INTR_EN, 0x00000000);
> -	pm_runtime_put_autosuspend(dev);
> +	pm_runtime_put_sync(dev);
>   }
>   
>   int mdp5_irq_postinstall(struct msm_kms *kms)
> @@ -72,7 +72,7 @@ int mdp5_irq_postinstall(struct msm_kms *kms)
>   
>   	pm_runtime_get_sync(dev);
>   	mdp_irq_register(mdp_kms, error_handler);
> -	pm_runtime_put_autosuspend(dev);
> +	pm_runtime_put_sync(dev);
>   
>   	return 0;
>   }
> @@ -84,7 +84,7 @@ void mdp5_irq_uninstall(struct msm_kms *kms)
>   
>   	pm_runtime_get_sync(dev);
>   	mdp5_write(mdp5_kms, REG_MDP5_INTR_EN, 0x00000000);
> -	pm_runtime_put_autosuspend(dev);
> +	pm_runtime_put_sync(dev);
>   }
>   
>   irqreturn_t mdp5_irq(struct msm_kms *kms)
> @@ -119,7 +119,7 @@ int mdp5_enable_vblank(struct msm_kms *kms, struct drm_crtc *crtc)
>   	pm_runtime_get_sync(dev);
>   	mdp_update_vblank_mask(to_mdp_kms(kms),
>   			mdp5_crtc_vblank(crtc), true);
> -	pm_runtime_put_autosuspend(dev);
> +	pm_runtime_put_sync(dev);
>   
>   	return 0;
>   }
> @@ -132,5 +132,5 @@ void mdp5_disable_vblank(struct msm_kms *kms, struct drm_crtc *crtc)
>   	pm_runtime_get_sync(dev);
>   	mdp_update_vblank_mask(to_mdp_kms(kms),
>   			mdp5_crtc_vblank(crtc), false);
> -	pm_runtime_put_autosuspend(dev);
> +	pm_runtime_put_sync(dev);
>   }
> diff --git a/drivers/gpu/drm/msm/mdp/mdp5/mdp5_kms.c b/drivers/gpu/drm/msm/mdp/mdp5/mdp5_kms.c
> index c664eb1d47dc..ca8f20206b6c 100644
> --- a/drivers/gpu/drm/msm/mdp/mdp5/mdp5_kms.c
> +++ b/drivers/gpu/drm/msm/mdp/mdp5/mdp5_kms.c
> @@ -125,7 +125,7 @@ static void mdp5_complete_commit(struct msm_kms *kms, struct drm_atomic_state *s
>   	if (mdp5_kms->smp)
>   		mdp5_smp_complete_commit(mdp5_kms->smp, &mdp5_kms->state->smp);
>   
> -	pm_runtime_put_autosuspend(dev);
> +	pm_runtime_put_sync(dev);
>   }
>   
>   static void mdp5_wait_for_crtc_commit_done(struct msm_kms *kms,
> @@ -496,7 +496,7 @@ static void read_mdp_hw_revision(struct mdp5_kms *mdp5_kms,
>   
>   	pm_runtime_get_sync(dev);
>   	version = mdp5_read(mdp5_kms, REG_MDP5_HW_VERSION);
> -	pm_runtime_put_autosuspend(dev);
> +	pm_runtime_put_sync(dev);
>   
>   	*major = FIELD(version, MDP5_HW_VERSION_MAJOR);
>   	*minor = FIELD(version, MDP5_HW_VERSION_MINOR);
> @@ -683,7 +683,7 @@ struct msm_kms *mdp5_kms_init(struct drm_device *dev)
>   		aspace = NULL;;
>   	}
>   
> -	pm_runtime_put_autosuspend(&pdev->dev);
> +	pm_runtime_put_sync(&pdev->dev);
>   
>   	ret = modeset_init(mdp5_kms);
>   	if (ret) {
> 

-- 
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ