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Message-ID: <20171021083210.njqhsc3wlhkh5g34@node.shutemov.name>
Date:   Sat, 21 Oct 2017 11:32:10 +0300
From:   "Kirill A. Shutemov" <kirill@...temov.name>
To:     Nitin Gupta <ngupta@...are.org>
Cc:     "Kirill A. Shutemov" <kirill.shutemov@...ux.intel.com>,
        Ingo Molnar <mingo@...hat.com>,
        Linus Torvalds <torvalds@...ux-foundation.org>, x86@...nel.org,
        Thomas Gleixner <tglx@...utronix.de>,
        "H. Peter Anvin" <hpa@...or.com>,
        Andy Lutomirski <luto@...capital.net>,
        Cyrill Gorcunov <gorcunov@...nvz.org>,
        Borislav Petkov <bp@...e.de>, Andi Kleen <ak@...ux.intel.com>,
        linux-mm <linux-mm@...ck.org>,
        linux-kernel <linux-kernel@...r.kernel.org>,
        Minchan Kim <minchan@...nel.org>,
        Sergey Senozhatsky <sergey.senozhatsky.work@...il.com>
Subject: Re: [PATCH 1/4] mm/zsmalloc: Prepare to variable MAX_PHYSMEM_BITS

On Fri, Oct 20, 2017 at 06:43:55PM -0700, Nitin Gupta wrote:
> On Fri, Oct 20, 2017 at 12:59 PM, Kirill A. Shutemov
> <kirill.shutemov@...ux.intel.com> wrote:
> > With boot-time switching between paging mode we will have variable
> > MAX_PHYSMEM_BITS.
> >
> > Let's use the maximum variable possible for CONFIG_X86_5LEVEL=y
> > configuration to define zsmalloc data structures.
> >
> > The patch introduces MAX_POSSIBLE_PHYSMEM_BITS to cover such case.
> > It also suits well to handle PAE special case.
> >
> 
> 
> I see that with your upcoming patch, MAX_PHYSMEM_BITS is turned into a
> variable for x86_64 case as: (pgtable_l5_enabled ? 52 : 46).
> 
> Even with this change, I don't see a need for this new
> MAX_POSSIBLE_PHYSMEM_BITS constant.

This is the error, I'm talking about:

mm/zsmalloc.c:249:21: error: variably modified ‘size_class’ at file scope
  struct size_class *size_class[ZS_SIZE_CLASSES];

ZS_SIZE_CLASSES
  ZS_MIN_ALLOC_SIZE
    OBJ_INDEX_BITS
      _PFN_BITS
        MAX_PHYSMEM_BITS
	  (pgtable_l5_enabled ? 52 : 46)

Check without the patch and full patchset applied.

-- 
 Kirill A. Shutemov

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