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Message-ID: <d61b6829-0515-a809-2a43-c41add4b1594@deltatee.com>
Date: Mon, 23 Oct 2017 16:04:26 -0600
From: Logan Gunthorpe <logang@...tatee.com>
To: David Laight <David.Laight@...LAB.COM>,
"'Petrosyan, Ludwig'" <ludwig.petrosyan@...y.de>
Cc: "Deucher, Alexander" <Alexander.Deucher@....com>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
"linux-rdma@...r.kernel.org" <linux-rdma@...r.kernel.org>,
"linux-nvdimm@...ts.01.org" <linux-nvdimm@...ts.01.org>,
"Linux-media@...r.kernel.org" <Linux-media@...r.kernel.org>,
"dri-devel@...ts.freedesktop.org" <dri-devel@...ts.freedesktop.org>,
"linux-pci@...r.kernel.org" <linux-pci@...r.kernel.org>,
"Bridgman, John" <John.Bridgman@....com>,
"Kuehling, Felix" <Felix.Kuehling@....com>,
"Sagalovitch, Serguei" <Serguei.Sagalovitch@....com>,
"Blinzer, Paul" <Paul.Blinzer@....com>,
"Koenig, Christian" <Christian.Koenig@....com>,
"Suthikulpanit, Suravee" <Suravee.Suthikulpanit@....com>,
"Sander, Ben" <ben.sander@....com>
Subject: Re: Enabling peer to peer device transactions for PCIe devices
On 23/10/17 10:08 AM, David Laight wrote:
> It is also worth checking that the hardware actually supports p2p transfers.
> Writes are more likely to be supported then reads.
> ISTR that some intel cpus support some p2p writes, but there could easily
> be errata against them.
Ludwig mentioned a PCIe switch. The few switches I'm aware of support
P2P transfers. So if everything is setup correctly, the TLPs shouldn't
even touch the CPU.
But, yes, generally it's a good idea to start with writes and see if
they work first.
Logan
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