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Date:   Wed, 25 Oct 2017 01:56:03 +0000
From:   "Levin, Alexander (Sasha Levin)" <alexander.levin@...izon.com>
To:     "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        "stable@...r.kernel.org" <stable@...r.kernel.org>
Cc:     Patrice Chotard <patrice.chotard@...com>,
        Gabriel Fernandez <gabriel.fernandez@...com>,
        "Levin, Alexander (Sasha Levin)" <alexander.levin@...izon.com>
Subject: [PATCH AUTOSEL for 4.9 44/50] ARM: dts: STiH410-family: fix wrong
 parent clock frequency

From: Patrice Chotard <patrice.chotard@...com>

[ Upstream commit b9ec866d223f38eb0bf2a7c836e10031ee17f7af ]

The clock parent was lower than child clock which is not correct.
In some use case, it leads to division by zero.

Signed-off-by: Gabriel Fernandez <gabriel.fernandez@...com>
Signed-off-by: Sasha Levin <alexander.levin@...izon.com>
---
 arch/arm/boot/dts/stih410.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/stih410.dtsi b/arch/arm/boot/dts/stih410.dtsi
index a3ef7341c051..4d329b2908be 100644
--- a/arch/arm/boot/dts/stih410.dtsi
+++ b/arch/arm/boot/dts/stih410.dtsi
@@ -131,7 +131,7 @@
 						 <&clk_s_d2_quadfs 0>;
 
 			assigned-clock-rates = <297000000>,
-					       <108000000>,
+					       <297000000>,
 					       <0>,
 					       <400000000>,
 					       <400000000>;
-- 
2.11.0

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