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Message-ID: <alpine.DEB.2.20.1710271031140.1961@nanos>
Date: Fri, 27 Oct 2017 15:51:02 +0200 (CEST)
From: Thomas Gleixner <tglx@...utronix.de>
To: Andy Lutomirski <luto@...nel.org>
cc: X86 ML <x86@...nel.org>, Borislav Petkov <bpetkov@...e.de>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
Brian Gerst <brgerst@...il.com>,
Dave Hansen <dave.hansen@...el.com>,
Linus Torvalds <torvalds@...ux-foundation.org>
Subject: Re: [PATCH 10/18] x86/asm/32: Pull MSR_IA32_SYSENTER_CS update code
out of native_load_sp0()
On Thu, 26 Oct 2017, Andy Lutomirski wrote:
> diff --git a/arch/x86/include/asm/processor.h b/arch/x86/include/asm/processor.h
> index b390ff76e58f..0167e3e35a57 100644
> --- a/arch/x86/include/asm/processor.h
> +++ b/arch/x86/include/asm/processor.h
> @@ -520,13 +520,6 @@ static inline void
> native_load_sp0(struct tss_struct *tss, struct thread_struct *thread)
> {
> tss->x86_tss.sp0 = thread->sp0;
> -#ifdef CONFIG_X86_32
> - /* Only happens when SEP is enabled, no need to test "SEP"arately: */
> - if (unlikely(tss->x86_tss.ss1 != thread->sysenter_cs)) {
> - tss->x86_tss.ss1 = thread->sysenter_cs;
> - wrmsr(MSR_IA32_SYSENTER_CS, thread->sysenter_cs, 0);
> - }
> -#endif
> }
>
> static inline void native_swapgs(void)
> diff --git a/arch/x86/include/asm/switch_to.h b/arch/x86/include/asm/switch_to.h
> index fcc5cd387fd1..f3fa19925ae1 100644
> --- a/arch/x86/include/asm/switch_to.h
> +++ b/arch/x86/include/asm/switch_to.h
> @@ -72,4 +72,15 @@ do { \
> ((last) = __switch_to_asm((prev), (next))); \
> } while (0)
>
> +#ifdef CONFIG_X86_32
> +static inline void refresh_sysenter_cs(struct thread_struct *thread)
> +{
> + /* Only happens when SEP is enabled, no need to test "SEP"arately: */
> + if (unlikely(this_cpu_read(cpu_tss.x86_tss.ss1) == thread->sysenter_cs))
> + return;
> +
> + this_cpu_write(cpu_tss.x86_tss.ss1, thread->sysenter_cs);
You lost the wrmsr() on the way... Ideally you move the code unmodified
first and then do the this_cpu_ change on top.
Thanks,
tglx
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