lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Date:   Mon, 30 Oct 2017 11:32:14 +0000
From:   Gabriele Paoloni <gabriele.paoloni@...wei.com>
To:     David Laight <David.Laight@...LAB.COM>,
        "catalin.marinas@....com" <catalin.marinas@....com>,
        "will.deacon@....com" <will.deacon@....com>,
        "robh+dt@...nel.org" <robh+dt@...nel.org>,
        "frowand.list@...il.com" <frowand.list@...il.com>,
        "bhelgaas@...gle.com" <bhelgaas@...gle.com>,
        "rafael@...nel.org" <rafael@...nel.org>,
        "arnd@...db.de" <arnd@...db.de>,
        "linux-arm-kernel@...ts.infradead.org" 
        <linux-arm-kernel@...ts.infradead.org>,
        "lorenzo.pieralisi@....com" <lorenzo.pieralisi@....com>
CC:     "mark.rutland@....com" <mark.rutland@....com>,
        "brian.starkey@....com" <brian.starkey@....com>,
        "olof@...om.net" <olof@...om.net>,
        "benh@...nel.crashing.org" <benh@...nel.crashing.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        "linux-acpi@...r.kernel.org" <linux-acpi@...r.kernel.org>,
        Linuxarm <linuxarm@...wei.com>,
        "linux-pci@...r.kernel.org" <linux-pci@...r.kernel.org>,
        "minyard@....org" <minyard@....org>,
        John Garry <john.garry@...wei.com>,
        "xuwei (O)" <xuwei5@...ilicon.com>
Subject: RE: [PATCH v10 0/9] LPC: legacy ISA I/O support

Hi David

[...]

> FWIW my thoughts on this are WTF!
> 
> Looks to me horribly over complicated and over generalised.
> 
> Surely is it could be done the same way that x86 does IO cycles?

No

> So you encode the information into the 'address' the driver passes
> to ioread16() (etc) to allow it to do either a normal bus cycle or
> the indirect cycle onto the external bus.

In order to do that you need to have a special PCI bridge that is able
to detect the special IO addresses and initiate such special IO cycles
on the external bus. This is not supported by our HW (and this why
we need the LPC accessors)

Gab

> 
> So you have one kernel option that makes these real functions.
> 
> 	David

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ