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Message-Id: <1509434380-24372-1-git-send-email-anischal@codeaurora.org>
Date: Tue, 31 Oct 2017 12:49:38 +0530
From: Amit Nischal <anischal@...eaurora.org>
To: Stephen Boyd <sboyd@...eaurora.org>,
Michael Turquette <mturquette@...libre.com>
Cc: Andy Gross <andy.gross@...aro.org>,
David Brown <david.brown@...aro.org>,
Rajendra Nayak <rnayak@...eaurora.org>,
Odelu Kukatla <okukatla@...eaurora.org>,
linux-arm-msm@...r.kernel.org, linux-soc@...r.kernel.org,
linux-clk@...r.kernel.org, linux-kernel@...r.kernel.org,
Amit Nischal <anischal@...eaurora.org>
Subject: [PATCH 0/2] clk: qcom: MISC RCG changes for upcoming targets
This patch series modifies clk_rcg2_shared_ops to support clock controller
drivers used in future chipsets and also clear hardware clock control bit
of RCGs where HW clock control bit is set in order to control those root
clocks by software.
Amit Nischal (2):
clk: qcom: clear hardware clock control bit of RCG
clk: qcom: Modify RCG shared ops to support freq_tbl without XO entry
drivers/clk/qcom/clk-rcg2.c | 84 +++++++++++++++++++++++++++++++++++++++------
1 file changed, 73 insertions(+), 11 deletions(-)
--
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