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Date: Wed, 1 Nov 2017 13:11:47 +0300 From: "Kirill A. Shutemov" <kirill@...temov.name> To: Andy Lutomirski <luto@...nel.org> Cc: Dave Hansen <dave.hansen@...ux.intel.com>, "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>, "linux-mm@...ck.org" <linux-mm@...ck.org>, moritz.lipp@...k.tugraz.at, daniel.gruss@...k.tugraz.at, michael.schwarz@...k.tugraz.at, Linus Torvalds <torvalds@...ux-foundation.org>, Kees Cook <keescook@...gle.com>, Hugh Dickins <hughd@...gle.com>, X86 ML <x86@...nel.org> Subject: Re: [PATCH 04/23] x86, tlb: make CR4-based TLB flushes more robust On Wed, Nov 01, 2017 at 01:01:45AM -0700, Andy Lutomirski wrote: > On Tue, Oct 31, 2017 at 3:31 PM, Dave Hansen > <dave.hansen@...ux.intel.com> wrote: > > > > Our CR4-based TLB flush currently requries global pages to be > > supported *and* enabled. But, we really only need for them to be > > supported. Make the code more robust by alllowing X86_CR4_PGE to > > clear as well as set. > > > > This change was suggested by Kirill Shutemov. > > I may have missed something, but why would be ever have CR4.PGE off? This came out from me thinking on if we can disable global pages by not turning on CR4.PGE instead of making _PAGE_GLOBAL zero. Dave decided to not take this path, but this change would make __native_flush_tlb_global_irq_disabled() a bit less fragile in case if the situation would change in the future. -- Kirill A. Shutemov
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