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Date: Wed, 1 Nov 2017 21:17:16 +0900 From: Stafford Horne <shorne@...il.com> To: Marc Zyngier <marc.zyngier@....com> Cc: LKML <linux-kernel@...r.kernel.org>, Stefan Kristiansson <stefan.kristiansson@...nalahti.fi>, Thomas Gleixner <tglx@...utronix.de>, Jason Cooper <jason@...edaemon.net>, Rob Herring <robh+dt@...nel.org>, Mark Rutland <mark.rutland@....com>, Jonas Bonn <jonas@...thpole.se>, "David S. Miller" <davem@...emloft.net>, Greg Kroah-Hartman <gregkh@...uxfoundation.org>, Mauro Carvalho Chehab <mchehab@...nel.org>, Randy Dunlap <rdunlap@...radead.org>, devicetree@...r.kernel.org, openrisc@...ts.librecores.org Subject: Re: [PATCH v4 05/13] irqchip: add initial support for ompic On Mon, Oct 30, 2017 at 06:11:40AM +0000, Marc Zyngier wrote: > On Mon, Oct 30 2017 at 1:18:06 pm GMT, Stafford Horne <shorne@...il.com> wrote: > > On Mon, Oct 30, 2017 at 02:29:18AM +0000, Marc Zyngier wrote: > >> On Mon, Oct 30 2017 at 8:11:15 am GMT, Stafford Horne <shorne@...il.com> wrote: > >> > From: Stefan Kristiansson <stefan.kristiansson@...nalahti.fi> > >> > > >> > IPI driver for the Open Multi-Processor Interrupt Controller (ompic) as > >> > described in the Multi-core support section of the OpenRISC 1.2 > >> > architecture specification: > >> > > >> > https://github.com/openrisc/doc/raw/master/openrisc-arch-1.2-rev0.pdf > >> > > >> > Each OpenRISC core contains a full interrupt controller which is used in > >> > the SMP architecture for interrupt balancing. This IPI device, the > >> > ompic, is the only external device required for enabling SMP on > >> > OpenRISC. > >> > > >> > Pending ops are stored in a memory bit mask which can allow multiple > >> > pending operations to be set and serviced at a time. This is mostly > >> > borrowed from the alpha IPI implementation. > >> > > >> > Cc: Marc Zyngier <marc.zyngier@....com> > >> > Acked-by: Rob Herring <robh@...nel.org> > >> > Signed-off-by: Stefan Kristiansson <stefan.kristiansson@...nalahti.fi> > >> > [shorne@...il.com: converted ops to bitmask, wrote commit message] > >> > Signed-off-by: Stafford Horne <shorne@...il.com> > >> > >> Reviewed-by: Marc Zyngier <marc.zyngier@....com> > > > > Thanks > > > >> Side question: what is your merge strategy for this? I can take it > >> through the irqchip tree as it is standalone, but I'm open to other > >> suggestions. > > > > For me its easier if I just take it through the openrisc tree, as > > there are dependencies between this series and the irqchip driver. > > If you are ok with that I can make a note to Linus indicating so in > > the pull request. > > No problem, that's OK with me. Acknowledged > > My plan is to send this series during the 4.15 merge window. > > Make sure this is in -next (when it comes back to life...). Its there now, and it looks like -next is almost back to life. -Stafford
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