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Message-ID: <20171101194822.hd76z7zjazlqbsmy@tarshish>
Date: Wed, 1 Nov 2017 21:48:22 +0200
From: Baruch Siach <baruch@...s.co.il>
To: Marc Gonzalez <marc_gonzalez@...madesigns.com>
Cc: Alan Cox <gnomes@...rguk.ukuu.org.uk>,
Mark Rutland <mark.rutland@....com>, Mason <slash.tmp@...e.fr>,
Russell King <linux@....linux.org.uk>,
Jonathan Austin <jonathan.austin@....com>,
Arnd Bergmann <arnd@...db.de>, Nicolas Pitre <nico@...aro.org>,
Peter Zijlstra <peterz@...radead.org>,
Stephen Boyd <sboyd@...eaurora.org>,
Michael Turquette <mturquette@...libre.com>,
Kevin Hilman <khilman@...nel.org>,
Will Deacon <will.deacon@....com>,
LKML <linux-kernel@...r.kernel.org>,
Steven Rostedt <rostedt@...dmis.org>,
Douglas Anderson <dianders@...omium.org>,
John Stultz <john.stultz@...aro.org>,
Thomas Gleixner <tglx@...utronix.de>,
Linus Torvalds <torvalds@...ux-foundation.org>,
Ingo Molnar <mingo@...nel.org>,
Linux ARM <linux-arm-kernel@...ts.infradead.org>,
linux-mtd@...ts.infradead.org
Subject: Re: [RFC] Improving udelay/ndelay on platforms where that is possible
Hi Marc,
On Wed, Nov 01, 2017 at 08:03:20PM +0100, Marc Gonzalez wrote:
> On 01/11/2017 18:53, Alan Cox wrote:
> > For that matter given the bad blocks don't randomly change why not cache
> > them ?
>
> That's a good question, I'll ask the NAND framework maintainer.
> Store them where, by the way? On the NAND chip itself?
Yes. In the bad block table (bbt). See drivers/mtd/nand/nand_bbt.c.
baruch
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