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Message-ID: <E26F4CF8B7DDDB4383A6C2D78D5C3CD56B497064@ATCPCS16.andestech.com>
Date:   Wed, 8 Nov 2017 09:32:36 +0000
From:   <vincentc@...estech.com>
To:     <arnd@...db.de>
CC:     <greentime@...estech.com>, <linux-kernel@...r.kernel.org>,
        <linux-arch@...r.kernel.org>, <tglx@...utronix.de>,
        <jason@...edaemon.net>, <marc.zyngier@....com>,
        <robh+dt@...nel.org>, <netdev@...r.kernel.org>,
        <palmer@...belt.com>
Subject: RE: [PATCH 11/31] nds32: Atomic operations

> -----Original Message-----
> From: arndbergmann@...il.com [mailto:arndbergmann@...il.com] On
> Behalf Of Arnd Bergmann
> Sent: Wednesday, November 08, 2017 4:54 PM
> To: Greentime Hu
> Cc: Greentime Ying-Han Hu(胡英漢); Linux Kernel Mailing List; linux-arch;
> Thomas Gleixner; Jason Cooper; Marc Zyngier; Rob Herring; Networking;
> Vincent Ren-Wei Chen(陳人維); Palmer Dabbelt
> Subject: Re: [PATCH 11/31] nds32: Atomic operations
>
> On Wed, Nov 8, 2017 at 6:54 AM, Greentime Hu <green.hu@...il.com>
> wrote:
> > From: Greentime Hu <greentime@...estech.com>
> >
> > Signed-off-by: Vincent Chen <vincentc@...estech.com>
> > Signed-off-by: Greentime Hu <greentime@...estech.com>
> > ---
> >  arch/nds32/include/asm/futex.h    |  116 ++++++++++++++++++++++++
> >  arch/nds32/include/asm/spinlock.h |  178
> > +++++++++++++++++++++++++++++++++++++
> >  2 files changed, 294 insertions(+)
> >  create mode 100644 arch/nds32/include/asm/futex.h  create mode
> 100644
> > arch/nds32/include/asm/spinlock.h
>
>
> > diff --git a/arch/nds32/include/asm/spinlock.h
> > b/arch/nds32/include/asm/spinlock.h
> > new file mode 100644
> > index 0000000..dd5fc71
> > --- /dev/null
> > +++ b/arch/nds32/include/asm/spinlock.h
> > @@ -0,0 +1,178 @@
> > +
> > +#define arch_spin_unlock_wait(lock) \
> > +       do { while (arch_spin_is_locked(lock)) cpu_relax(); } while
> > +(0)
>
> This was removed from the other architectures in commit
> 952111d7db02 ("arch: Remove spin_unlock_wait() arch-specific definitions")
>
> Please remove this as well.
>
Dear Arnd:

I will remove them in the next version patch.


> Palmer, I see riscv has the same thing, please also add a patch to your tree to
> remove it.
>
> > +#define arch_spin_lock_flags(lock, flags) arch_spin_lock(lock)
> > +
> > +static inline void arch_spin_lock(arch_spinlock_t * lock) {
> > +       unsigned long tmp;
> > +
> > +       __asm__ __volatile__("1:\n"
> > +                            "\tllw\t%0, [%1]\n"
> > +                            "\tbnez\t%0, 1b\n"
> > +                            "\tmovi\t%0, #0x1\n"
> > +                            "\tscw\t%0, [%1]\n"
> > +                            "\tbeqz\t%0, 1b\n"
> > +                            :"=&r"(tmp)
> > +                            :"r"(&lock->lock)
> > +                            :"memory");
>
> The coding style seems inconsistent here, the other inline asm uses real tabs
> instead of \t, and 'asm volatile' is generally preferred over '__asm__
> __volatile__'.
>
>        Arnd

OK, I will modify it in the next version patch.

Thanks

Best regards
Vincent
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