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Date:   Wed,  8 Nov 2017 23:57:12 -0800
From:   Stephane Eranian <>
Subject: [PATCH v4 4/5] perf/record: add documentation for using PERF_SAMPLE_SKID_IP

This patch adds documentation to describe how to use the skid
ip support with perf record. The sample type can be provided
per event as follows: pmu_instance/...,skid-ip=1/

For instance on Intel X86:

$ perf record -e cpu/event=0xc5,skid-ip=1/pp

does record the precise address of retired branches and their target.

Signed-off-by: Stephane Eranian <>
 tools/perf/Documentation/perf-record.txt | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/tools/perf/Documentation/perf-record.txt b/tools/perf/Documentation/perf-record.txt
index 5a626ef666c2..f0e3636dc4be 100644
--- a/tools/perf/Documentation/perf-record.txt
+++ b/tools/perf/Documentation/perf-record.txt
@@ -57,6 +57,14 @@ OPTIONS
 			 FP mode, "dwarf" for DWARF mode, "lbr" for LBR mode and
 			 "no" for disable callgraph.
 	  - 'stack-size': user stack size for dwarf mode
+	  - 'skid-ip' : boolean, captures the unmodified interrupt instruction pointer
+			(IP) in each sample. Usually with event-based sampling, the IP
+			has skid and rarely point to the instruction which caused the
+			event to overflow. On some architectures, the hardware can eliminate
+			the skid and perf_events returns it as the IP with precise sampling is
+			enabled. But for certain measurements, it may be useful to have both
+			the correct and skid ip. This option enable capturing the skid ip in
+			additional to the corrected ip. Default is: false
           See the linkperf:perf-list[1] man page for more parameters.

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