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Date: Thu, 9 Nov 2017 08:19:06 -0800 From: Jim Mattson <jmattson@...gle.com> To: Paolo Bonzini <pbonzini@...hat.com> Cc: Wanpeng Li <kernellwp@...il.com>, Krish Sadhukhan <krish.sadhukhan@...cle.com>, LKML <linux-kernel@...r.kernel.org>, kvm list <kvm@...r.kernel.org>, Radim Krčmář <rkrcmar@...hat.com>, Wanpeng Li <wanpeng.li@...mail.com> Subject: Re: [PATCH v5 3/3] KVM: nVMX: Fix mmu context after VMLAUNCH/VMRESUME failure Will do. On Thu, Nov 9, 2017 at 2:40 AM, Paolo Bonzini <pbonzini@...hat.com> wrote: > On 09/11/2017 01:37, Wanpeng Li wrote: >> 2017-11-09 5:47 GMT+08:00 Jim Mattson <jmattson@...gle.com>: >>> I realize now that there are actually many other problems with >>> deferring some control field checks to the hardware VM-entry of >>> vmcs02. When there is an invalid control field, the vCPU should just >>> fall through to the next instruction, without any state modifiation >>> other than the ALU flags and the VM-instruction error field of the >>> current VMCS. However, in preparation for the hardware VM-entry of >>> vmcs02, we have already changed quite a bit of the vCPU state: the >>> MSRs on the VM-entry MSR-load list, DR7, IA32_DEBUGCTL, the entire >>> FLAGS register, etc. All of these changes should be undone, and we're >>> not prepared to do that. (For instance, what was the old DR7 value >>> that needs to be restored?) >> I didn't observe real issue currently, and I hope this patchset can >> catch the upcoming merge window. Then we can dig more into your >> concern. > > Can any of you write a simple testcase for just one bug (e.g. DR7)? > > Thanks, > > Paolo
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