linux-kernel - RE: [PATCH V0 2/3] perf/x86/intel/bm.c: Add Intel Branch Monitoring support

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Date:   Sat, 11 Nov 2017 00:50:13 +0000
From:   "Dey, Megha" <megha.dey@...el.com>
To:     Jiri Olsa <jolsa@...hat.com>, Megha Dey <megha.dey@...ux.intel.com>
CC:     "x86@...nel.org" <x86@...nel.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        "linux-doc@...r.kernel.org" <linux-doc@...r.kernel.org>,
        "tglx@...utronix.de" <tglx@...utronix.de>,
        "mingo@...hat.com" <mingo@...hat.com>,
        "hpa@...or.com" <hpa@...or.com>,
        "andriy.shevchenko@...ux.intel.com" 
        <andriy.shevchenko@...ux.intel.com>,
        "kstewart@...uxfoundation.org" <kstewart@...uxfoundation.org>,
        "Yu, Yu-cheng" <yu-cheng.yu@...el.com>,
        "Brown, Len" <len.brown@...el.com>,
        "gregkh@...uxfoundation.org" <gregkh@...uxfoundation.org>,
        "peterz@...radead.org" <peterz@...radead.org>,
        "acme@...nel.org" <acme@...nel.org>,
        "alexander.shishkin@...ux.intel.com" 
        <alexander.shishkin@...ux.intel.com>,
        "namhyung@...nel.org" <namhyung@...nel.org>,
        "vikas.shivappa@...ux.intel.com" <vikas.shivappa@...ux.intel.com>,
        "pombredanne@...b.com" <pombredanne@...b.com>,
        "me@...ehuey.com" <me@...ehuey.com>, "bp@...e.de" <bp@...e.de>,
        "Andrejczuk, Grzegorz" <grzegorz.andrejczuk@...el.com>,
        "Luck, Tony" <tony.luck@...el.com>,
        "corbet@....net" <corbet@....net>,
        "Shankar, Ravi V" <ravi.v.shankar@...el.com>
Subject: RE: [PATCH V0 2/3] perf/x86/intel/bm.c: Add Intel Branch Monitoring
 support



>-----Original Message-----
>From: Jiri Olsa [mailto:jolsa@...hat.com]
>Sent: Saturday, November 4, 2017 6:26 AM
>To: Megha Dey <megha.dey@...ux.intel.com>
>Cc: x86@...nel.org; linux-kernel@...r.kernel.org; linux-
>doc@...r.kernel.org; tglx@...utronix.de; mingo@...hat.com;
>hpa@...or.com; andriy.shevchenko@...ux.intel.com;
>kstewart@...uxfoundation.org; Yu, Yu-cheng <yu-cheng.yu@...el.com>;
>Brown, Len <len.brown@...el.com>; gregkh@...uxfoundation.org;
>peterz@...radead.org; acme@...nel.org;
>alexander.shishkin@...ux.intel.com; namhyung@...nel.org;
>vikas.shivappa@...ux.intel.com; pombredanne@...b.com;
>me@...ehuey.com; bp@...e.de; Andrejczuk, Grzegorz
><grzegorz.andrejczuk@...el.com>; Luck, Tony <tony.luck@...el.com>;
>corbet@....net; Shankar, Ravi V <ravi.v.shankar@...el.com>; Dey, Megha
><megha.dey@...el.com>
>Subject: Re: [PATCH V0 2/3] perf/x86/intel/bm.c: Add Intel Branch
>Monitoring support
>
>On Fri, Nov 03, 2017 at 11:00:05AM -0700, Megha Dey wrote:
>
>SNIP
>
>> +static unsigned int bm_threshold = BM_MAX_THRESHOLD; static
>unsigned
>> +int bm_mispred_evt_cnt;
>> +
>> +/* Branch monitoring counter owners */ static struct perf_event
>> +*bm_counter_owner[2];
>
>SNIP
>
>> +	 * Find a hardware counter for the target task
>> +	 */
>> +	for (i = 0; i < bm_num_counters; i++) {
>> +		if ((bm_counter_owner[i] == NULL) ||
>> +			(bm_counter_owner[i]->state ==
>PERF_EVENT_STATE_DEAD)) {
>> +			counter_to_use = i;
>> +			bm_counter_owner[i] = event;
>> +			break;
>> +		}
>> +	}
>> +
>> +	if (counter_to_use == -1)
>> +		return -EBUSY;
>
>not sure I understand, your docs says: "There are 2 8-bit counters that each..
>"
>
>so there are 2 counters per CPU? if that's corrent, isn't this check too strict
>then? you could have more events configured running on other CPUs for
>another tasks
>
>given that we do task only events here, should bm_counter_owner be part
>of task, together with the limit..? I'm probably missing something..

Yes you are right. Initially, we had support for 2 events(from one or 2 tasks) to be monitored for the entire system. This indeed seems very limiting. In the next patchset, I will add support for 2 events per task (This is what the hardware can support).
>
>thanks,
>jirka