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Message-ID: <CAFBinCBJck9p8dDr-tmzFVyCk0Udfh4pB0z8c_HmJ4T+g20tQw@mail.gmail.com>
Date: Sun, 12 Nov 2017 02:35:26 +0100
From: Martin Blumenstingl <martin.blumenstingl@...glemail.com>
To: Yixun Lan <yixun.lan@...ogic.com>
Cc: Neil Armstrong <narmstrong@...libre.com>,
Jerome Brunet <jbrunet@...libre.com>,
devicetree@...r.kernel.org, Jonathan Cameron <jic23@...nel.org>,
Rob Herring <robh+dt@...nel.org>,
Mark Rutland <mark.rutland@....com>,
Michael Turquette <mturquette@...libre.com>,
Stephen Boyd <sboyd@...eaurora.org>,
Carlo Caione <carlo@...one.org>,
Kevin Hilman <khilman@...libre.com>,
Xingyu Chen <xingyu.chen@...ogic.com>,
linux-amlogic@...ts.infradead.org, linux-iio@...r.kernel.org,
linux-clk@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH v4 0/4] fix the clock setting for SAR ADC
Hi Yixun,
On Tue, Nov 7, 2017 at 10:36 PM, Martin Blumenstingl
<martin.blumenstingl@...glemail.com> wrote:
> Hi Yixun,
>
> On Tue, Nov 7, 2017 at 3:09 PM, Yixun Lan <yixun.lan@...ogic.com> wrote:
>> patch [1/4]:
>> Fix wrong SARADC/SANA clock gate bit in Meson-GXBB/GXL,
>> the published datasheets[4] also has wrong description about this.
>> This patch should be explicitly merged *before* other patches.
>>
>> patch [2-4/4]:
>> Drop the "sana" clock from SAR ADC module,
> I agree with Jerome that patch 2/4 should be applied last.
> when I wrote the driver I couldn't get it to work on my GXBB board
> (which unfortunately has died since then) because the clocks were
> disabled (they weren't enabled by the bootloader). people who are
> using an old .dtb would get the same problem again until the clock
> driver is merged
>
>> From the hardware perspective, the SAR ADC module doesn't
>> require "sana" clock to wrok. This should apply to all SoC,
>> including meson6,8, GXBB, GXL..
> thank you for clarifying this!
>
>> Note: the whole patchset series has been tested at GXL-P212 board,
>> we haven't got any meson6,8 board to test, so I would appreciate
>> if someone (Martin?) could help to confirm it works there.
> I can test this on a Meson8b and a Meson8m2 board on the weekend -
> I'll let you know about the results
the ADC still works fine with this series applied on my Meson8m2 board
as well as my Meson8b EC-100
I added my "Reviewed-by" and "Acked-by" to the corresponding patches
(with a change request on the .dts patch)
Thank you for fixing this!
Regards
Martin
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