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Date:   Mon, 13 Nov 2017 17:24:01 +0100
From:   Paolo Bonzini <pbonzini@...hat.com>
To:     Luwei Kang <luwei.kang@...el.com>, kvm@...r.kernel.org
Cc:     rkrcmar@...hat.com, tglx@...utronix.de, mingo@...hat.com,
        hpa@...or.com, x86@...nel.org, linux-kernel@...r.kernel.org,
        Chao Peng <chao.p.peng@...ux.intel.com>
Subject: Re: [patch v2 8/8] KVM: x86: Disable intercept for Intel processor
 trace MSRs

On 30/10/2017 23:05, Luwei Kang wrote:
> From: Chao Peng <chao.p.peng@...ux.intel.com>
> 
> Pass through Intel processor trace to guest directly.
> 
> Signed-off-by: Chao Peng <chao.p.peng@...ux.intel.com>
> Signed-off-by: Luwei Kang <luwei.kang@...el.com>
> ---
>  arch/x86/kvm/vmx.c | 13 +++++++++++++
>  1 file changed, 13 insertions(+)
> 
> diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c
> index 8f61a8d..01447e2 100644
> --- a/arch/x86/kvm/vmx.c
> +++ b/arch/x86/kvm/vmx.c
> @@ -7029,6 +7029,19 @@ static __init int hardware_setup(void)
>  		!cpu_has_vmx_intel_pt() || !cpu_has_vmx_pt_use_gpa())
>  		pt_mode = PT_MODE_SYSTEM;
>  
> +	if (pt_mode == PT_MODE_HOST_GUEST) {
> +		u32 i, eax, ebx, ecx, edx;
> +
> +		cpuid_count(0x14, 1, &eax, &ebx, &ecx, &edx);
> +		vmx_disable_intercept_for_msr(MSR_IA32_RTIT_STATUS, false);
> +		vmx_disable_intercept_for_msr(MSR_IA32_RTIT_OUTPUT_BASE, false);
> +		vmx_disable_intercept_for_msr(MSR_IA32_RTIT_OUTPUT_MASK, false);
> +		vmx_disable_intercept_for_msr(MSR_IA32_RTIT_CR3_MATCH, false);
> +		for (i = 0; i < (eax & 0x7); i++)
> +			vmx_disable_intercept_for_msr(MSR_IA32_RTIT_ADDR0_A + i,
> +									false);
> +	}
> +

As I mentioned earlier, this probably makes vmentry/vmexit too expensive
when guests are not using processor tracing.  I would do it only if
guest TRACEEN=1 (since anyway the values have to be correct if guest
TRACEEN=1, and a change in TRACEEN always causes a vmexit).

Paolo

>  	return alloc_kvm_area();
>  
>  out:
> 

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