lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Date:   Mon, 13 Nov 2017 09:01:26 -0800
From:   Dave Hansen <dave.hansen@...el.com>
To:     Andy Lutomirski <luto@...nel.org>, X86 ML <x86@...nel.org>
Cc:     Borislav Petkov <bpetkov@...e.de>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        Brian Gerst <brgerst@...il.com>,
        Linus Torvalds <torvalds@...ux-foundation.org>
Subject: Re: [RFC 4/7] x86/asm: Fix assumptions that the HW TSS is at the
 beginning of cpu_tss

On 11/10/2017 08:05 PM, Andy Lutomirski wrote:
> -struct tss_struct doublefault_tss __cacheline_aligned = {
> -	.x86_tss = {
> -		.sp0		= STACK_START,
> -		.ss0		= __KERNEL_DS,
> -		.ldt		= 0,
...
> +struct x86_hw_tss doublefault_tss __cacheline_aligned = {
> +	.sp0		= STACK_START,
> +	.ss0		= __KERNEL_DS,
> +	.ldt		= 0,
> +	.io_bitmap_base	= INVALID_IO_BITMAP_OFFSET,

FWIW, I really like the trend of renaming the hardware structures in
such a way that it's clear that they *are* hardware structures.

It might also be nice to reference the relevant SDM sections on the
topic, or even to include a comment along the lines of how it get used.
This chunk from the SDM is particularly relevant:

"The TSS holds information important to 64-bit mode and that is not
directly related to the task-switch mechanism."

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ