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Message-ID: <CAAsGZS7oCjHuUTUAUadb+F+drp3KgDARuaOaSBbW-8RWbJBDMA@mail.gmail.com>
Date: Thu, 16 Nov 2017 14:41:39 -0800
From: chetan L <loke.chetan@...il.com>
To: Jerome Glisse <jglisse@...hat.com>
Cc: Bob Liu <lliubbo@...il.com>, David Nellans <dnellans@...dia.com>,
John Hubbard <jhubbard@...dia.com>,
Balbir Singh <bsingharora@...il.com>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
Michal Hocko <mhocko@...nel.org>,
Linux MM <linux-mm@...ck.org>,
Dan Williams <dan.j.williams@...el.com>,
Andrew Morton <akpm@...ux-foundation.org>,
linux-accelerators@...ts.ozlabs.org
Subject: Re: [PATCH 0/6] Cache coherent device memory (CDM) with HMM v5
On Thu, Nov 16, 2017 at 1:29 PM, Jerome Glisse <jglisse@...hat.com> wrote:
>
> For the NUMA discussion this is related to CPU less node ie not wanting
> to add any more CPU less node (node with only memory) and they are other
> aspect too. For instance you do not necessarily have good informations
> from the device to know if a page is access a lot by the device (this
> kind of information is often only accessible by the device driver). Thus
@Jerome - one comment w.r.t 'do not necessarily have good info on
device access'.
So you could be assuming a few things here :). CCIX extends the CPU
complex's coherency domain(it is now a single/unified coherency
domain). The CCIX-EP (lets say an accelerator/XPU or a NIC or a combo)
is now a true peer w.r.t the host-numa-node(s) (aka 1st class
citizen). I don't know how much info was revealed at the latest ARM
techcon where CCIX was presented. So I cannot divulge any further
details until I see that slide deck. However, you can safely assume
that the host will have *all* the info w.r.t the device-access and
vice-versa.
Chetan
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