linux-kernel - Re: [PATCH 1/2 v2] dmaengine: rcar-dmac: ensure CHCR DE bit is actually 0 after clear

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Message-ID: <87mv3lrcxg.wl%kuninori.morimoto.gx@renesas.com>
Date:   Fri, 17 Nov 2017 00:10:06 +0000
From:   Kuninori Morimoto <kuninori.morimoto.gx@...esas.com>
To:     Geert Uytterhoeven <geert@...ux-m68k.org>
Cc:     Laurent Pinchart <laurent.pinchart@...asonboard.com>,
        Dan Williams <dan.j.williams@...el.com>,
        Vinod Koul <vinod.koul@...el.com>,
        Niklas Söderlund 
        <niklas.soderlund+renesas@...natech.se>, dmaengine@...r.kernel.org,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@...esas.com>
Subject: Re: [PATCH 1/2 v2] dmaengine: rcar-dmac: ensure CHCR DE bit is actually 0 after clear


Hi Geert

> > DMAC reads data from source device, and buffered it until transferable
> > size for shink device. Because of this behavoir, DMAC is including
> 
> sink, behavior
(snip)
> > 0 after cleared.
> 
> clearing

Grr, thanks.

> > +static void rcar_dmac_chcr_de_barrier(struct rcar_dmac_chan *chan)
> > +{
> > +       u32 chcr;
> > +       int i;
> 
> unsigned int
> 
> > +
> > +       /*
> > +        * Ensure that the setting of the DE bit is actually 0 after
> > +        * clearing it.
> > +        */
> > +       for (i = 0; i < 1024; i++) {
> > +               chcr = rcar_dmac_chan_read(chan, RCAR_DMACHCR);
> > +               if (!(chcr & RCAR_DMACHCR_DE))
> > +                       return;
> > +               udelay(1);
> > +       }
> 
> What's a typical number of loops needed before DE is really cleared?

It case by case, but I don't want to use while(1) loop

Best regards
---
Kuninori Morimoto