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Message-ID: <1511173991.6971.7.camel@baylibre.com>
Date:   Mon, 20 Nov 2017 11:33:11 +0100
From:   Jerome Brunet <jbrunet@...libre.com>
To:     Yixun Lan <yixun.lan@...ogic.com>,
        Linus Walleij <linus.walleij@...aro.org>,
        Kevin Hilman <khilman@...libre.com>
Cc:     Neil Armstrong <narmstrong@...libre.com>,
        Carlo Caione <carlo@...one.org>,
        Xingyu Chen <xingyu.chen@...ogic.com>,
        linux-gpio@...r.kernel.org, linux-amlogic@...ts.infradead.org,
        linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v2 1/2] pinctrl: meson-axg: Introduce a pinctrl pinmux
 ops for Meson-AXG SoC

On Mon, 2017-11-20 at 18:08 +0800, Yixun Lan wrote:
> From: Xingyu Chen <xingyu.chen@...ogic.com>
> 
> The pin controller has been updated in the Amlogic Meson AXG series,
> which use continuous 4-bit register to select function for each pin.
> In order to support this, a new pinmux operations "meson_axg_pmx_ops"
> has been added.
> 
> Reviewed-by: Neil Armstrong <narmstrong@...libre.com>

Reviewed-by: Jerome Brunet <jbrunet@...libre.com>

> Signed-off-by: Xingyu Chen <xingyu.chen@...ogic.com>
> Signed-off-by: Yixun Lan <yixun.lan@...ogic.com>

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