[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <alpine.DEB.2.20.1711202254070.2348@nanos>
Date: Mon, 20 Nov 2017 22:55:36 +0100 (CET)
From: Thomas Gleixner <tglx@...utronix.de>
To: Andy Lutomirski <luto@...nel.org>
cc: X86 ML <x86@...nel.org>, Borislav Petkov <bpetkov@...e.de>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
Brian Gerst <brgerst@...il.com>,
Dave Hansen <dave.hansen@...el.com>,
Linus Torvalds <torvalds@...ux-foundation.org>,
Josh Poimboeuf <jpoimboe@...hat.com>
Subject: Re: [PATCH 01/16] x86/asm/64: Allocate and enable the SYSENTER
stack
On Mon, 20 Nov 2017, Andy Lutomirski wrote:
> This will simplify future changes that want scratch variables early in
> the SYSENTER handler -- they'll be able to spill registers to the
> stack. It also lets us get rid of a SWAPGS_UNSAFE_STACK user.
>
> This does not depend on CONFIG_IA32_EMULATION because we'll want the
> stack space even without IA32 emulation.
>
> As far as I can tell, the reason that this wasn't done from day 1 is
> that we use IST for #DB and #BP, which is IMO rather nasty and causes
> a lot more problems than it solves. But, since #DB uses IST, we don't
> actually need a real stack for SYSENTER (because SYSENTER with TF set
> will invoke #DB on the IST stack rather than the SYSENTER stack).
> I want to remove IST usage from these vectors some day, and this patch
> is a prerequisite for that as well.
>
> Signed-off-by: Andy Lutomirski <luto@...nel.org>
Reviewed-by: Thomas Gleixner <tglx@...utronix.de>
Powered by blists - more mailing lists