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Message-ID: <20171123142417.GR10981@intel.com>
Date: Thu, 23 Nov 2017 16:24:17 +0200
From: Ville Syrjälä <ville.syrjala@...ux.intel.com>
To: Kees Cook <keescook@...gle.com>
Cc: Rodrigo Vivi <rodrigo.vivi@...el.com>,
intel-gfx@...ts.freedesktop.org,
LKML <linux-kernel@...r.kernel.org>
Subject: Re: [Intel-gfx] i915: enum intel_dpll_id cast
On Wed, Nov 22, 2017 at 12:54:49PM -0800, Kees Cook wrote:
> Hi,
>
> While doing Clang test builds, this was reported:
>
> drivers/gpu/drm/i915/intel_ddi.c:1481:30: warning: implicit conversion
> from enumeration type 'enum port' to different enumeration type 'enum
> intel_dpll_id' [-Wenum-conversion]
> enum intel_dpll_id pll_id = port;
> ~~~~~~ ^~~~
>
> Which is from:
>
> static void bxt_ddi_clock_get(struct intel_encoder *encoder,
> struct intel_crtc_state *pipe_config)
> {
> struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
> enum port port = intel_ddi_get_encoder_port(encoder);
> enum intel_dpll_id pll_id = port;
>
> pipe_config->port_clock = bxt_calc_pll_link(dev_priv, pll_id);
> ...
> }
>
> In looking at it, it seems to be harmless if as enum port has a
> smaller range than enum intel_dpll_id. I just wanted to check if maybe
> something might go weird, since DPLL_ID_LCPLL_2700 maybe ends up
> getting seen as I915_MAX_PORTS?
BXT can only ever have port values PORT_[A-C] and the matching
dpll_id values (DPLL_ID_SKL_DPLL[0-2]), so it's fine.
Also that implicit cast is actually gone from the latest code thanks
to commit bb911536f07e ("drm/i915: Eliminate pll->state usage from
bxt_calc_pll_link()").
>
> enum port {
> PORT_NONE = -1,
> PORT_A = 0,
> PORT_B,
> PORT_C,
> PORT_D,
> PORT_E,
> I915_MAX_PORTS
> };
>
> enum intel_dpll_id {
> ...
> DPLL_ID_LCPLL_2700 = 5,
> ...
> };
>
>
> Thanks!
>
> -Kees
>
> --
> Kees Cook
> Pixel Security
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@...ts.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Ville Syrjälä
Intel OTC
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