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Message-ID: <alpine.DEB.2.20.1711232034300.2364@nanos>
Date: Thu, 23 Nov 2017 20:34:52 +0100 (CET)
From: Thomas Gleixner <tglx@...utronix.de>
To: Andy Lutomirski <luto@...nel.org>
cc: X86 ML <x86@...nel.org>, Borislav Petkov <bpetkov@...e.de>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
Brian Gerst <brgerst@...il.com>,
Dave Hansen <dave.hansen@...el.com>,
Linus Torvalds <torvalds@...ux-foundation.org>,
Josh Poimboeuf <jpoimboe@...hat.com>
Subject: Re: [PATCH v2 11/18] x86/asm/64: Separate cpu_current_top_of_stack
from TSS.sp0
On Tue, 21 Nov 2017, Andy Lutomirski wrote:
> On 64-bit kernels, we used to assume that TSS.sp0 was the current
> top of stack. With the addition of an entry trampoline, this will
> no longer be the case. Store the current top of stack in TSS.sp1,
> which is otherwise unused but shares the same cacheline.
>
> Signed-off-by: Andy Lutomirski <luto@...nel.org>
Reviewed-by: Thomas Gleixner <tglx@...utronix.de>
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