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Message-ID: <alpine.DEB.2.20.1711251759440.2316@nanos>
Date: Sat, 25 Nov 2017 18:03:36 +0100 (CET)
From: Thomas Gleixner <tglx@...utronix.de>
To: Andy Lutomirski <luto@...capital.net>
cc: Borislav Petkov <bp@...en8.de>, Ingo Molnar <mingo@...nel.org>,
linux-kernel@...r.kernel.org,
Dave Hansen <dave.hansen@...ux.intel.com>,
"H . Peter Anvin" <hpa@...or.com>,
Peter Zijlstra <peterz@...radead.org>,
Linus Torvalds <torvalds@...ux-foundation.org>
Subject: Re: [PATCH 20/43] x86/entry: Clean up SYSENTER_stack code
On Sat, 25 Nov 2017, Andy Lutomirski wrote:
> > On Nov 25, 2017, at 9:50 AM, Thomas Gleixner <tglx@...utronix.de> wrote:
> >
> > On Sat, 25 Nov 2017, Borislav Petkov wrote:
> >>> -
> >>> + wrmsr(MSR_IA32_SYSENTER_ESP, (unsigned long)(cpu_SYSENTER_stack(cpu) + 1), 0);
> >>> wrmsr(MSR_IA32_SYSENTER_EIP, (unsigned long)entry_SYSENTER_32, 0);
> >>
> >> Right, so we have now two TSS thingies, AFAICT:
> >>
> >> tss = &per_cpu(cpu_tss, cpu);
> >>
> >> which is cpu_tss and then indirectly, we have also:
> >>
> >> &get_cpu_entry_area((cpu))->tss
> >>
> >> And those are two different things in my guest here:
> >>
> >> [ 0.044002] tss: 0xf5747000
> >> [ 0.044706] entry area tss: 0xffef1000
> >>
> >> What is the logic here? We carry two TSSs per CPU - one which is RO
> >> for the entry area and the other is the actual cpu_tss thing? Or am I
> >> misreading it?
> >
> > entry area tss is a alias mapping of cpu_tss
> >
> > + set_percpu_fixmap_pages(get_cpu_entry_area_index(cpu, tss),
> > + &per_cpu(cpu_tss, cpu),
> > + sizeof(struct tss_struct) / PAGE_SIZE,
> > + PAGE_KERNEL);
> >
>
> Exactly. And, in the patch I haven't emailed, the alias is RO on x86_64.
Btw, I don't think you have to worry about making it RO. The SDM is blurry
about that for 64bit. RW is a must for 32bit though.
> Maybe I should rename cpu_tss to cpu_tss_rw in that patch.
For clarity that would be nice.
Thanks,
tglx
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