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Date:   Sat, 25 Nov 2017 21:29:19 +0200
From:   Jarkko Sakkinen <jarkko.sakkinen@...ux.intel.com>
To:     platform-driver-x86@...r.kernel.org, x86@...nel.org
Cc:     linux-kernel@...r.kernel.org,
        Kai Huang <kai.huang@...ux.intel.com>,
        Jarkko Sakkinen <jarkko.sakkinen@...ux.intel.com>,
        Thomas Gleixner <tglx@...utronix.de>,
        Ingo Molnar <mingo@...hat.com>,
        "H. Peter Anvin" <hpa@...or.com>, Borislav Petkov <bp@...e.de>,
        Janakarajan Natarajan <Janakarajan.Natarajan@....com>,
        Radim Krčmář <rkrcmar@...hat.com>,
        Vikas Shivappa <vikas.shivappa@...ux.intel.com>,
        "Kirill A. Shutemov" <kirill.shutemov@...ux.intel.com>,
        Grzegorz Andrejczuk <grzegorz.andrejczuk@...el.com>
Subject: [PATCH v6 02/11] x86: add SGX definition to cpufeature

From: Kai Huang <kai.huang@...ux.intel.com>

Added X86_FEATURE_SGX, which identifies that CPU supports software guard
extensions (SGX).

Signed-off-by: Kai Huang <kai.huang@...ux.intel.com>
Signed-off-by: Jarkko Sakkinen <jarkko.sakkinen@...ux.intel.com>
---
 arch/x86/include/asm/cpufeatures.h | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpufeatures.h
index 2519c6c801c9..31a7d1c0f204 100644
--- a/arch/x86/include/asm/cpufeatures.h
+++ b/arch/x86/include/asm/cpufeatures.h
@@ -219,6 +219,7 @@
 /* Intel-defined CPU features, CPUID level 0x00000007:0 (ebx), word 9 */
 #define X86_FEATURE_FSGSBASE	( 9*32+ 0) /* {RD/WR}{FS/GS}BASE instructions*/
 #define X86_FEATURE_TSC_ADJUST	( 9*32+ 1) /* TSC adjustment MSR 0x3b */
+#define X86_FEATURE_SGX		( 9*32+ 2) /* Software Guard Extensions */
 #define X86_FEATURE_BMI1	( 9*32+ 3) /* 1st group bit manipulation extensions */
 #define X86_FEATURE_HLE		( 9*32+ 4) /* Hardware Lock Elision */
 #define X86_FEATURE_AVX2	( 9*32+ 5) /* AVX2 instructions */
-- 
2.14.1

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