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Message-ID: <DB6PR04MB322104DB1B2FCBD535AAA49488250@DB6PR04MB3221.eurprd04.prod.outlook.com>
Date: Mon, 27 Nov 2017 09:43:41 +0000
From: Peng Fan <peng.fan@....com>
To: Russell King - ARM Linux <linux@...linux.org.uk>
CC: "linux-arm-kernel@...ts.infradead.org"
<linux-arm-kernel@...ts.infradead.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
"van.freenix@...il.com" <van.freenix@...il.com>,
Mark Rutland <mark.rutland@....com>,
Thomas Gleixner <tglx@...utronix.de>,
Chris Brandt <chris.brandt@...esas.com>,
Will Deacon <will.deacon@....com>
Subject: RE: [PATCH] arm: l2c: unlock ways when in non-secure mode
Hi Russell,
> -----Original Message-----
> From: Russell King - ARM Linux [mailto:linux@...linux.org.uk]
> Sent: Monday, November 27, 2017 5:20 PM
> To: Peng Fan <peng.fan@....com>
> Cc: linux-arm-kernel@...ts.infradead.org; linux-kernel@...r.kernel.org;
> van.freenix@...il.com; Mark Rutland <mark.rutland@....com>; Thomas
> Gleixner <tglx@...utronix.de>; Chris Brandt <chris.brandt@...esas.com>; Will
> Deacon <will.deacon@....com>
> Subject: Re: [PATCH] arm: l2c: unlock ways when in non-secure mode
>
> On Sun, Nov 26, 2017 at 11:56:10PM +0000, Peng Fan wrote:
> > Hi Russell,
> >
> > > Subject: Re: [PATCH] arm: l2c: unlock ways when in non-secure mode
> > >
> > > On Sun, Nov 26, 2017 at 08:25:30PM +0800, Peng Fan wrote:
> > > > To boot Linux in Non-secure mode with l2x0, the l2x0 controller is
> > > > enabled in secure mode and ways locked to make it seems L2 cache
> > > > disabled during linux boot process. So during l2x0 initialization,
> > > > need to unlock the ways to make l2x0 could cache data/inst.
> > >
> > > Why was this chosen instead of doing what everyone else does?
> >
> > I am not aware of how other platform handles the l2x0 unlock in non
> > secure mode. Could you please share with me what others choose?
>
> That's not what I was asking.
>
> Everyone else provides a way for the l2x0 controller to be enabled and disabled
> from non-secure mode.
Thanks for the information. I see that some platforms implements l2c_write_sec.
>
> Why have you decided to enable the l2x0 controller and leave it enabled, and
> then lock down all the cache ways - which means you need the kernel to do
> something entirely different for your platform.
Currently we are running OP-TEE on i.MX6/7 with Linux in non-secure mode. See
In https://github.com/OP-TEE/optee_os/blob/master/core/arch/arm/kernel/generic_entry_a32.S#L428
Pl310 is enabled. And In
https://github.com/OP-TEE/optee_os/blob/master/core/arch/arm/kernel/generic_entry_a32.S#L461
pl310 locked before returning back to Linux.
I see ti platform not enabled pl310 in OP-TEE, leaving Linux to enable it. platform-sam/stm/ zynq7k/imx
Have pl310 enabled in OP-TEE.
I could switch to use l2c_write_sec dedicated for i.MX. But I think this patch is also a valid point.
What do you suggest?
Thanks,
Peng.
>
> --
> RMK's Patch system:
> https://emea01.safelinks.protection.outlook.com/?url=http%3A%2F%2Fwww.
> armlinux.org.uk%2Fdeveloper%2Fpatches%2F&data=02%7C01%7Cpeng.fan%4
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