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Message-Id: <1511763628-11856-7-git-send-email-okaya@codeaurora.org>
Date: Mon, 27 Nov 2017 01:20:27 -0500
From: Sinan Kaya <okaya@...eaurora.org>
To: linux-pci@...r.kernel.org, timur@...eaurora.org
Cc: linux-arm-msm@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org,
Sinan Kaya <okaya@...eaurora.org>,
Bjorn Helgaas <bhelgaas@...gle.com>,
linux-kernel@...r.kernel.org (open list)
Subject: [PATCH V2 6/7] PCI: add device wait after slot and bus reset
Rev 3.1 Sec 2.3.1 Request Handling Rules indicates that a device can issue
CRS following secondary bus reset. Handle device presence gracefully.
Signed-off-by: Sinan Kaya <okaya@...eaurora.org>
---
drivers/pci/pci.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c
index 0a9a696..8472c24 100644
--- a/drivers/pci/pci.c
+++ b/drivers/pci/pci.c
@@ -4035,7 +4035,7 @@ int pci_reset_bridge_secondary_bus(struct pci_dev *dev)
{
pcibios_reset_secondary_bus(dev);
- return 0;
+ return pci_dev_wait(dev, "bus reset", PCIE_RESET_READY_POLL_MS);
}
EXPORT_SYMBOL_GPL(pci_reset_bridge_secondary_bus);
--
1.9.1
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