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Message-ID: <b6e921c4-ad7e-e4a8-9420-60da395ef960@gmail.com>
Date:   Tue, 28 Nov 2017 11:14:32 -0800
From:   Florian Fainelli <f.fainelli@...il.com>
To:     Alexandre Belloni <alexandre.belloni@...e-electrons.com>,
        Ralf Baechle <ralf@...ux-mips.org>
Cc:     linux-mips@...ux-mips.org, linux-kernel@...r.kernel.org,
        Rob Herring <robh+dt@...nel.org>, devicetree@...r.kernel.org
Subject: Re: [PATCH 08/13] dt-bindings: mips: Add bindings for Microsemi SoCs

On 11/28/2017 07:26 AM, Alexandre Belloni wrote:
> Add bindings for Microsemi SoCs. Currently only Ocelot is supported.
> 
> Signed-off-by: Alexandre Belloni <alexandre.belloni@...e-electrons.com>
> ---
> Cc: Rob Herring <robh+dt@...nel.org>
> Cc: devicetree@...r.kernel.org
> 
>  Documentation/devicetree/bindings/mips/mscc.txt | 6 ++++++
>  1 file changed, 6 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/mips/mscc.txt
> 
> diff --git a/Documentation/devicetree/bindings/mips/mscc.txt b/Documentation/devicetree/bindings/mips/mscc.txt
> new file mode 100644
> index 000000000000..2c52e76b7142
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/mips/mscc.txt
> @@ -0,0 +1,6 @@
> +* Microsemi MIPS CPUs
> +
> +Required properties:
> +- compatible: "brcm,ocelot"

You probably intended to use mscc,ocelot here, right?
-- 
Florian

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