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Message-Id: <20171128100552.544306001@linuxfoundation.org>
Date: Tue, 28 Nov 2017 11:23:20 +0100
From: Greg Kroah-Hartman <gregkh@...uxfoundation.org>
To: linux-kernel@...r.kernel.org
Cc: Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
stable@...r.kernel.org, Icenowy Zheng <icenowy@...c.xyz>,
Maxime Ripard <maxime.ripard@...e-electrons.com>,
Sasha Levin <alexander.levin@...izon.com>
Subject: [PATCH 4.9 099/138] clk: sunxi-ng: fix PLL_CPUX adjusting on A33
4.9-stable review patch. If anyone has any objections, please let me know.
------------------
From: Icenowy Zheng <icenowy@...c.xyz>
[ Upstream commit 790d929b540661945d1c70652ffb602c5c06ad85 ]
When adjusting PLL_CPUX on A33, the PLL is temporarily driven too high,
and the system hangs.
Add a notifier to avoid this situation by temporarily switching to a
known stable 24 MHz oscillator.
Signed-off-by: Icenowy Zheng <icenowy@...c.xyz>
Signed-off-by: Maxime Ripard <maxime.ripard@...e-electrons.com>
Signed-off-by: Sasha Levin <alexander.levin@...izon.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@...uxfoundation.org>
---
drivers/clk/sunxi-ng/ccu-sun8i-a33.c | 10 ++++++++++
1 file changed, 10 insertions(+)
--- a/drivers/clk/sunxi-ng/ccu-sun8i-a33.c
+++ b/drivers/clk/sunxi-ng/ccu-sun8i-a33.c
@@ -752,6 +752,13 @@ static const struct sunxi_ccu_desc sun8i
.num_resets = ARRAY_SIZE(sun8i_a33_ccu_resets),
};
+static struct ccu_mux_nb sun8i_a33_cpu_nb = {
+ .common = &cpux_clk.common,
+ .cm = &cpux_clk.mux,
+ .delay_us = 1, /* > 8 clock cycles at 24 MHz */
+ .bypass_index = 1, /* index of 24 MHz oscillator */
+};
+
static void __init sun8i_a33_ccu_setup(struct device_node *node)
{
void __iomem *reg;
@@ -775,6 +782,9 @@ static void __init sun8i_a33_ccu_setup(s
writel(val, reg + SUN8I_A33_PLL_MIPI_REG);
sunxi_ccu_probe(node, reg, &sun8i_a33_ccu_desc);
+
+ ccu_mux_notifier_register(pll_cpux_clk.common.hw.clk,
+ &sun8i_a33_cpu_nb);
}
CLK_OF_DECLARE(sun8i_a33_ccu, "allwinner,sun8i-a33-ccu",
sun8i_a33_ccu_setup);
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