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Message-ID: <20171128121345.xc3pbsx4hoaoapu4@flea.home>
Date: Tue, 28 Nov 2017 13:13:45 +0100
From: Maxime Ripard <maxime.ripard@...e-electrons.com>
To: Icenowy Zheng <icenowy@...c.io>
Cc: Linus Walleij <linus.walleij@...aro.org>,
Chen-Yu Tsai <wens@...e.org>, linux-gpio@...r.kernel.org,
devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-kernel@...r.kernel.org, linux-sunxi@...glegroups.com
Subject: Re: [PATCH] pinctrl: sunxi: add support for Allwinner H6 main pin
controller
Hi,
On Tue, Nov 28, 2017 at 07:06:14PM +0800, Icenowy Zheng wrote:
> Allwinner H6 SoC has two pin controllers like other Allwinner SoCs with
> ARISC: one main pin controller (called CPUX-PORT in user manual) and one
> pin controller in the CPUs power domain (called CPUS-PORT in user
> manual).
>
> This commit adds support for the main pin controller in the H6 SoC.
>
> Signed-off-by: Icenowy Zheng <icenowy@...c.io>
This looks mostly fine, but we've had issues in the past with pinctrl
drivers submitted without SoC support, and we'll have to support them
forever.
Please resend this as part your upcoming serie to enable the H6.
Maxime
--
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
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