linux-kernel - Re: [PATCH 4/6] x86/mm/kaiser: Support PCID without INVPCID

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Date:   Wed, 29 Nov 2017 14:38:41 +0100
From:   Peter Zijlstra <peterz@...radead.org>
To:     linux-kernel@...r.kernel.org, Thomas Gleixner <tglx@...utronix.de>
Cc:     Dave Hansen <dave.hansen@...ux.intel.com>,
        Andy Lutomirski <luto@...nel.org>,
        Ingo Molnar <mingo@...nel.org>, Borislav Petkov <bp@...en8.de>,
        Brian Gerst <brgerst@...il.com>,
        Denys Vlasenko <dvlasenk@...hat.com>,
        "H. Peter Anvin" <hpa@...or.com>,
        Josh Poimboeuf <jpoimboe@...hat.com>,
        Linus Torvalds <torvalds@...ux-foundation.org>,
        Rik van Riel <riel@...hat.com>, daniel.gruss@...k.tugraz.at,
        hughd@...gle.com, keescook@...gle.com, linux-mm@...ck.org,
        michael.schwarz@...k.tugraz.at, moritz.lipp@...k.tugraz.at,
        richard.fellner@...dent.tugraz.at,
        Andy Lutomirski <luto@...capital.net>
Subject: Re: [PATCH 4/6] x86/mm/kaiser: Support PCID without INVPCID

On Wed, Nov 29, 2017 at 01:31:58PM +0100, Peter Zijlstra wrote:
> On Wed, Nov 29, 2017 at 11:33:05AM +0100, Peter Zijlstra wrote:
> > @@ -220,7 +215,27 @@ For 32-bit we have the following convent
> >  .macro SWITCH_TO_USER_CR3 scratch_reg:req
> >  	STATIC_JUMP_IF_FALSE .Lend_\@, kaiser_enabled_key, def=1
> >  	mov	%cr3, \scratch_reg
> > -	ADJUST_USER_CR3 \scratch_reg
> > +
> > +	/*
> > +	 * Test if the ASID needs a flush.
> > +	 */
> > +	push	\scratch_reg			/* preserve CR3 */
> 
> So I was just staring at disasm of a few functions and I noticed this
> one reads like push, while others read like pushq.
> 
> So does the stupid assembler thing really do a 32bit push if you provide
> it with a 64bit register?

N/m, I just really cannot read straight today. The pushq's were a mem64,
not a r64 argument to push.