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Message-ID: <20171130173604.yjbbhnjvxgavaacz@lakrids.cambridge.arm.com>
Date:   Thu, 30 Nov 2017 17:36:04 +0000
From:   Mark Rutland <mark.rutland@....com>
To:     Will Deacon <will.deacon@....com>
Cc:     linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
        catalin.marinas@....com, ard.biesheuvel@...aro.org,
        sboyd@...eaurora.org, dave.hansen@...ux.intel.com,
        keescook@...omium.org, msalter@...hat.com, labbott@...hat.com,
        tglx@...utronix.de
Subject: Re: [PATCH v2 03/18] arm64: mm: Move ASID from TTBR0 to TTBR1

Hi Will,

On Thu, Nov 30, 2017 at 04:39:31PM +0000, Will Deacon wrote:
> In preparation for mapping kernelspace and userspace with different
> ASIDs, move the ASID to TTBR1 and update switch_mm to context-switch
> TTBR0 via an invalid mapping (the zero page).
> 
> Signed-off-by: Will Deacon <will.deacon@....com>

[...]

> +#define cpu_switch_mm(pgd,mm)				\
> +do {							\
> +	BUG_ON(pgd == swapper_pg_dir);			\
> +	cpu_set_reserved_ttbr0();			\
> +	cpu_do_switch_mm(virt_to_phys(pgd),mm);		\
> +} while (0)

A minor thing, but could we please fix the spacing for the
cpu_do_switch_mm() arguments while we move this?

AFAICT, there's no reason this needs to be a macro, and the following
works with v4.15-rc1 defconfig:

static inline void cpu_switch_mm(pgd_t *pgd, struct mm_struct *mm)
{
	BUG_ON(pgd == swapper_pg_dir);
	cpu_set_reserved_ttbr0();
	cpu_do_switch_mm(virt_to_phys(pgd), mm);
}

Otherwise, the patch looks good to me.

Thanks,
Mark.

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