linux-kernel - Re: [PATCH 15/24] x86/mm: Allow flushing for future ASID switches

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Message-ID: <20171130192010.n73yjnsiwyyu2qnz@hirez.programming.kicks-ass.net>
Date:   Thu, 30 Nov 2017 20:20:10 +0100
From:   Peter Zijlstra <peterz@...radead.org>
To:     Dave Hansen <dave.hansen@...ux.intel.com>
Cc:     Ingo Molnar <mingo@...nel.org>, linux-kernel@...r.kernel.org,
        Andy Lutomirski <luto@...capital.net>,
        Thomas Gleixner <tglx@...utronix.de>,
        "H . Peter Anvin" <hpa@...or.com>, Borislav Petkov <bp@...en8.de>,
        Linus Torvalds <torvalds@...ux-foundation.org>
Subject: Re: [PATCH 15/24] x86/mm: Allow flushing for future ASID switches

On Thu, Nov 30, 2017 at 11:00:06AM -0800, Dave Hansen wrote:
> On 11/30/2017 10:55 AM, Peter Zijlstra wrote:
> >> __flush_tlb() does a flushing CR3 write that flushes the current PCID.
> >> If we need other PCIDs flushed, we have to do it via the
> >> tlb_flush_shared_nonglobals() mechanism.
> > But the thing is, you _cannot_ have PCID enabled in that branch.
> 
> Is there some hardware limitation that I'm missing?

No, but in setup_pcid() we explicit clear PCID if !PGE.

And as you said, there isn't actually any real hardware that has this
combination, so who cares.