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Message-ID: <20171201061311.16691-3-vigneshr@ti.com>
Date: Fri, 1 Dec 2017 11:43:09 +0530
From: Vignesh R <vigneshr@...com>
To: Bjorn Helgaas <bhelgaas@...gle.com>,
Rob Herring <robh+dt@...nel.org>,
Tony Lindgren <tony@...mide.com>,
Chris Welch <Chris.Welch@...visolutions.com>
CC: Kishon Vijay Abraham I <kishon@...com>,
Lorenzo Pieralisi <lorenzo.pieralisi@....com>,
<linux-omap@...r.kernel.org>, <linux-pci@...r.kernel.org>,
<devicetree@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
<linux-arm-kernel@...ts.infradead.org>, Vignesh R <vigneshr@...com>
Subject: [PATCH 2/4] dt-bindings: PCI: dra7xx: Add bindings for unaligned access in host mode
Update device tree binding documentation of TI's dra7xx PCI controller
for enabling unaligned mem access as applicable not just in EP mode but
in host mode as well.
Signed-off-by: Vignesh R <vigneshr@...com>
---
Documentation/devicetree/bindings/pci/ti-pci.txt | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/Documentation/devicetree/bindings/pci/ti-pci.txt b/Documentation/devicetree/bindings/pci/ti-pci.txt
index 7f7af3044016..452fe48c4fdd 100644
--- a/Documentation/devicetree/bindings/pci/ti-pci.txt
+++ b/Documentation/devicetree/bindings/pci/ti-pci.txt
@@ -26,6 +26,11 @@ HOST MODE
ranges,
interrupt-map-mask,
interrupt-map : as specified in ../designware-pcie.txt
+ - ti,syscon-unaligned-access: phandle to the syscon DT node. The 1st argument
+ should contain the register offset within syscon
+ and the 2nd argument should contain the bit field
+ for setting the bit to enable unaligned
+ access.
DEVICE MODE
===========
--
2.15.0
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