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Message-ID: <20171201174002.GA8826@arm.com>
Date: Fri, 1 Dec 2017 17:40:03 +0000
From: Will Deacon <will.deacon@....com>
To: Mark Rutland <mark.rutland@....com>
Cc: linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
catalin.marinas@....com, ard.biesheuvel@...aro.org,
sboyd@...eaurora.org, dave.hansen@...ux.intel.com,
keescook@...omium.org, msalter@...hat.com, labbott@...hat.com,
tglx@...utronix.de
Subject: Re: [PATCH v2 13/18] arm64: entry: Hook up entry trampoline to
exception vectors
On Fri, Dec 01, 2017 at 01:53:01PM +0000, Mark Rutland wrote:
> On Thu, Nov 30, 2017 at 04:39:41PM +0000, Will Deacon wrote:
> > .macro kernel_ventry, el, label, regsize = 64
> > .align 7
> > +#ifdef CONFIG_UNMAP_KERNEL_AT_EL0
> > + .if \el == 0
> > + .if \regsize == 64
> > + mrs x30, tpidrro_el0
> > + msr tpidrro_el0, xzr
> > + .else
> > + mov x30, xzr
>
> I guess that's just to prevent acccidental leaks if we dump registers
> somewhere, since we used x30 as a scratch register?
Indeed. I don't have a concrete example, but I was worried about things
like perf and ptrace, which might allow you to get at the AArch64 register
state for a compat task so it felt like a good idea to zero this.
Will
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