linux-kernel - Re: [patch 55/60] x86/mm: Use INVPCID for __native_flush_tlb

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Message-ID: <20171204225144.GD20227@worktop.programming.kicks-ass.net>
Date:   Mon, 4 Dec 2017 23:51:44 +0100
From:   Peter Zijlstra <peterz@...radead.org>
To:     Andy Lutomirski <luto@...nel.org>
Cc:     Thomas Gleixner <tglx@...utronix.de>,
        LKML <linux-kernel@...r.kernel.org>, X86 ML <x86@...nel.org>,
        Linus Torvalds <torvalds@...ux-foundation.org>,
        Dave Hansen <dave.hansen@...el.com>,
        Borislav Petkov <bpetkov@...e.de>,
        Greg KH <gregkh@...uxfoundation.org>,
        Kees Cook <keescook@...gle.com>,
        Hugh Dickins <hughd@...gle.com>,
        Brian Gerst <brgerst@...il.com>,
        Josh Poimboeuf <jpoimboe@...hat.com>,
        Denys Vlasenko <dvlasenk@...hat.com>,
        Rik van Riel <riel@...hat.com>,
        Boris Ostrovsky <boris.ostrovsky@...cle.com>,
        Juergen Gross <jgross@...e.com>,
        David Laight <David.Laight@...lab.com>,
        Eduardo Valentin <eduval@...zon.com>, aliguori@...zon.com,
        Will Deacon <will.deacon@....com>,
        Daniel Gruss <daniel.gruss@...k.tugraz.at>,
        Dave Hansen <dave.hansen@...ux.intel.com>
Subject: Re: [patch 55/60] x86/mm: Use INVPCID for __native_flush_tlb_single()

On Mon, Dec 04, 2017 at 02:25:43PM -0800, Andy Lutomirski wrote:
> On Mon, Dec 4, 2017 at 6:08 AM, Thomas Gleixner <tglx@...utronix.de> wrote:
> > From: Dave Hansen <dave.hansen@...ux.intel.com>
> >
> > This uses INVPCID to shoot down individual lines of the user mapping
> > instead of marking the entire user map as invalid. This
> > could/might/possibly be faster.
> >
> > This for sure needs tlb_single_page_flush_ceiling to be redetermined;
> > esp. since INVPCID is _slow_.
> 
> I'm wondering if INVPCID is *so* slow that this patch is entirely
> counterproductive.

We should find some of the benchmarks that were used to determine
tlb_single_page_flush_ceiling and measure. I've not gotten around to
doing either.

Someone called Dave Hansen did that patch and might still have something
lying around to help with that:

  a5102476a24b ("x86/mm: Set TLB flush tunable to sane value (33)")